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authorElyes Haouas <ehaouas@noos.fr>2022-10-11 13:40:51 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-12 14:18:01 +0000
commitc929f0933f5f4bbb15573a1bb64c799cd1fc3a02 (patch)
tree9d60591a5650e3814abb11910522ed60db288cd0 /src/southbridge/amd/pi
parentbaec560c7a6178edb9ba1e4d1d1bd6aee1852d0d (diff)
treewide: Use 'gpe0_blk' for 'x_gpe0_blk.addrl'
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I05d5097097b925a7bc8058f4c23e7c13a49f03c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd/pi')
-rw-r--r--src/southbridge/amd/pi/hudson/fadt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c
index eb79f9f7aa..8eea5baeae 100644
--- a/src/southbridge/amd/pi/hudson/fadt.c
+++ b/src/southbridge/amd/pi/hudson/fadt.c
@@ -92,6 +92,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */
fadt->x_gpe0_blk.bit_offset = 0;
fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
- fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK;
+ fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
fadt->x_gpe0_blk.addrh = 0x0;
}