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authorElyes HAOUAS <ehaouas@noos.fr>2019-01-03 10:23:28 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-07 10:28:59 +0000
commit0f8b8d920c2f060bbe7a9139fde823e3b2e875d7 (patch)
tree8d53a881ad95ab6a4e9e5ded8622d99fd2b0b360 /src/southbridge/amd/cimx/sb800
parentf212cf3506a9ad3d699a4afe148bfd554932f7b8 (diff)
src: Move constant to the right side of comparison
Change-Id: I76d35a3643600f81a6da7e0af99c935ebd1c2fc7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/27015 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 60d40f7049..e3390d5c60 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -353,9 +353,9 @@ static void sb800_enable(struct device *dev)
case PCI_DEVFN(0x11, 0): /* 0:11.0 SATA */
if (dev->enabled) {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED;
- if (1 == sb_chip->boot_switch_sata_ide)
+ if (sb_chip->boot_switch_sata_ide == 1)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary.
- else if (0 == sb_chip->boot_switch_sata_ide)
+ else if (sb_chip->boot_switch_sata_ide == 0)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 1; //1 -IDE as secondary.
} else {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_DISABLED;
@@ -387,7 +387,7 @@ static void sb800_enable(struct device *dev)
case PCI_DEVFN(0x14, 2): /* 0:14:2 HDA */
if (dev->enabled) {
- if (AZALIA_DISABLE == sb_config->AzaliaController) {
+ if (sb_config->AzaliaController == AZALIA_DISABLE) {
sb_config->AzaliaController = AZALIA_AUTO;
}
} else {