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authorJeremy Compostella <jeremy.compostella@intel.com>2024-09-18 16:44:21 -0700
committerSubrata Banik <subratabanik@google.com>2024-09-21 05:03:30 +0000
commitecc3596cb235977dbd776a46d3919f8f5d348cf8 (patch)
treed112c12b49d74806156a7d97fafa54cd90d8d10b /src/soc
parent7e67198e4103c0139e7f2657f7c8b5077d0e0b3a (diff)
soc/intel/ptl: Provide the TCSS port policy setting options
Each TCSS port can be associated a setting via the tcss_cap_policy device tree field. The setting can be picked within five values listed by this commit. BUG=b/348678529 TEST=fatcat board build tcss_cap_policy[0]=TCSS_TYPE_C_PORT_FULL_FUN Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d56 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pranava Y N <pranavayn@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/pantherlake/chip.h1
-rw-r--r--src/soc/intel/pantherlake/include/soc/tcss.h8
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h
index 27d766f584..85dcccd1f6 100644
--- a/src/soc/intel/pantherlake/chip.h
+++ b/src/soc/intel/pantherlake/chip.h
@@ -16,6 +16,7 @@
#include <soc/pci_devs.h>
#include <soc/pmc.h>
#include <soc/serialio.h>
+#include <soc/tcss.h>
#include <soc/usb.h>
#include <stdint.h>
diff --git a/src/soc/intel/pantherlake/include/soc/tcss.h b/src/soc/intel/pantherlake/include/soc/tcss.h
index 79604bcfa1..a1d72b862a 100644
--- a/src/soc/intel/pantherlake/include/soc/tcss.h
+++ b/src/soc/intel/pantherlake/include/soc/tcss.h
@@ -16,4 +16,12 @@
#define BIAS_CTRL_VW_INDEX_SHIFT 24
#define BIAS_CTRL_BIT_POS_SHIFT 16
+enum {
+ TCSS_TYPE_C_PORT_DISABLE,
+ TCSS_TYPE_C_PORT_DP_ONLY,
+ TCSS_TYPE_C_PORT_NO_TBT,
+ TCSS_TYPE_C_PORT_NO_PCIE,
+ TCSS_TYPE_C_PORT_FULL_FUN = 7
+};
+
#endif