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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-08-08 11:37:03 -0500
committerFelix Held <felix-coreboot@felixheld.de>2023-08-09 19:08:57 +0000
commit7cf9c7451808421300a00279abb4d48c42e5050a (patch)
treeb72b9119ac2fc312d27f65f50af4dbd71eacf79c /src/soc
parentdcce5a33e95b1fa3c09a0ab0a9e951336cbf096e (diff)
soc/amd/*: Fix UART ACPI device status
Prior to commit d1c0f958d198 ("acpi: Call acpi_fill_ssdt() only for enabled devices"), uart_inject_ssdt() was used to set the ACPI status (_STA) for both enabled and disabled devices. The aforementioned commit limited it to being called only on enabled devices, which left disabled devices without any _STA method at all -- which the OS assumes means that the device is present and enabled. To fix this, create the _STA method in the UART asl code for each port, and set the return value to a name variable (STAT) which defaults to 0 (not present/disabled). Then, have uart_inject_ssdt() set STAT to present and enabled (0xF) for UARTs actually present on the board. TEST=build/boot google/skyrim (frostflow), dump ACPI tables, and verify that _STA returns 0xF only for UARTs enabled in devicetree. Change-Id: Id89e74c3ea7f53280935898ee35311b7cf3b152a Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77092 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/acpi/mmio.asl12
-rw-r--r--src/soc/amd/common/block/uart/uart.c6
-rw-r--r--src/soc/amd/glinda/acpi/mmio.asl30
-rw-r--r--src/soc/amd/mendocino/acpi/mmio.asl30
-rw-r--r--src/soc/amd/phoenix/acpi/mmio.asl30
-rw-r--r--src/soc/amd/picasso/acpi/mmio.asl24
-rw-r--r--src/soc/amd/stoneyridge/acpi/mmio.asl10
7 files changed, 138 insertions, 4 deletions
diff --git a/src/soc/amd/cezanne/acpi/mmio.asl b/src/soc/amd/cezanne/acpi/mmio.asl
index e73c423600..722f32d573 100644
--- a/src/soc/amd/cezanne/acpi/mmio.asl
+++ b/src/soc/amd/cezanne/acpi/mmio.asl
@@ -87,6 +87,12 @@ Device (FUR0)
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
}
@@ -118,6 +124,12 @@ Device (FUR1) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
}
diff --git a/src/soc/amd/common/block/uart/uart.c b/src/soc/amd/common/block/uart/uart.c
index 96b9883b8c..ca678fd59b 100644
--- a/src/soc/amd/common/block/uart/uart.c
+++ b/src/soc/amd/common/block/uart/uart.c
@@ -67,13 +67,11 @@ static const char *uart_acpi_name(const struct device *dev)
return NULL;
}
-/* This gets called for both enabled and disabled devices. */
+/* This gets called for enabled devices only. */
static void uart_inject_ssdt(const struct device *dev)
{
acpigen_write_scope(acpi_device_path(dev));
-
- acpigen_write_STA(acpi_device_status(dev));
-
+ acpigen_write_store_int_to_namestr(acpi_device_status(dev), "STAT");
acpigen_pop_len(); /* Scope */
}
#endif
diff --git a/src/soc/amd/glinda/acpi/mmio.asl b/src/soc/amd/glinda/acpi/mmio.asl
index 1aeb3d88ea..eb1f1d9b1c 100644
--- a/src/soc/amd/glinda/acpi/mmio.asl
+++ b/src/soc/amd/glinda/acpi/mmio.asl
@@ -89,6 +89,12 @@ Device (FUR0)
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
}
@@ -120,6 +126,12 @@ Device (FUR1) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
}
@@ -151,6 +163,12 @@ Device (FUR2) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
}
@@ -182,6 +200,12 @@ Device (FUR3) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
}
@@ -213,6 +237,12 @@ Device (FUR4) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
}
diff --git a/src/soc/amd/mendocino/acpi/mmio.asl b/src/soc/amd/mendocino/acpi/mmio.asl
index 983ad59d67..5c364d8800 100644
--- a/src/soc/amd/mendocino/acpi/mmio.asl
+++ b/src/soc/amd/mendocino/acpi/mmio.asl
@@ -89,6 +89,12 @@ Device (FUR0)
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
}
@@ -120,6 +126,12 @@ Device (FUR1) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
}
@@ -151,6 +163,12 @@ Device (FUR2) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
}
@@ -182,6 +200,12 @@ Device (FUR3) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
}
@@ -213,6 +237,12 @@ Device (FUR4) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
}
diff --git a/src/soc/amd/phoenix/acpi/mmio.asl b/src/soc/amd/phoenix/acpi/mmio.asl
index 37c926c81d..f5b27d16ee 100644
--- a/src/soc/amd/phoenix/acpi/mmio.asl
+++ b/src/soc/amd/phoenix/acpi/mmio.asl
@@ -89,6 +89,12 @@ Device (FUR0)
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
}
@@ -120,6 +126,12 @@ Device (FUR1) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
}
@@ -151,6 +163,12 @@ Device (FUR2) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
}
@@ -182,6 +200,12 @@ Device (FUR3) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
}
@@ -213,6 +237,12 @@ Device (FUR4) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
}
diff --git a/src/soc/amd/picasso/acpi/mmio.asl b/src/soc/amd/picasso/acpi/mmio.asl
index c229284eb0..86733c1a6f 100644
--- a/src/soc/amd/picasso/acpi/mmio.asl
+++ b/src/soc/amd/picasso/acpi/mmio.asl
@@ -124,6 +124,12 @@ Device (FUR0)
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
}
@@ -157,6 +163,12 @@ Device (FUR1) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
}
@@ -190,6 +202,12 @@ Device (FUR2) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
}
@@ -223,6 +241,12 @@ Device (FUR3) {
}
}
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
+
AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
}
diff --git a/src/soc/amd/stoneyridge/acpi/mmio.asl b/src/soc/amd/stoneyridge/acpi/mmio.asl
index b6f4fc37a3..362b9f5dbc 100644
--- a/src/soc/amd/stoneyridge/acpi/mmio.asl
+++ b/src/soc/amd/stoneyridge/acpi/mmio.asl
@@ -47,6 +47,11 @@ Device (FUR0)
IRQ (Edge, ActiveHigh, Exclusive) { 10 }
Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000)
})
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
}
Device (FUR1) {
@@ -57,6 +62,11 @@ Device (FUR1) {
IRQ (Edge, ActiveHigh, Exclusive) { 11 }
Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000)
})
+ Name (STAT, 0x0)
+ Method (_STA, 0x0, NotSerialized)
+ {
+ Return (STAT)
+ }
}
Device (I2CA) {