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authorZheng Bao <fishbaozi@gmail.com>2022-01-22 11:03:56 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-24 15:50:47 +0000
commit6dfa528af9d2f539b154ce812385cd085251480c (patch)
tree7699e647122c6d708e7669a10ee3b12fd564cc83 /src/soc
parent0d7eaba0d6fe70c57d8d45cc480f6cd460682a4d (diff)
soc/amd/common: Make the function in cpu.c available in romstage
Change-Id: I909f74853a37a783582471e05071bc3d07e3dcf8 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/cpu/noncar/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/Makefile.inc b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
index 532bb32918..71927961db 100644
--- a/src/soc/amd/common/block/cpu/noncar/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
@@ -5,6 +5,7 @@ bootblock-y += pre_c.S
bootblock-y += write_resume_eip.c
romstage-y += memmap.c
ramstage-y += cpu.c
+romstage-y += cpu.c
ramstage-y += memmap.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_NONCAR