diff options
author | Maximilian Brune <maximilian.brune@9elements.com> | 2024-01-19 06:42:54 +0100 |
---|---|---|
committer | Maximilian Brune <maximilian.brune@9elements.com> | 2024-06-12 19:15:44 +0000 |
commit | 40c4cbed2f1c9d636593e16b894e28c5ae889d0e (patch) | |
tree | 1c61c532cc8ef98c8279a5df9672d1bbdb7e8725 /src/soc | |
parent | 12f1fe68fc9d1a3cd941e9c4ac87c2ce7e819249 (diff) |
soc/sifive/fu540/memlayout.ld: Enlarge OpenSBI region
OpenSBI got bigger and doesn't fit anymore in 128K which causes coreboot
to not compiler anymore because the region overlaps with ramstage
This patch simply increases the size and uses the OpenSBI linker macro
instead.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: If1ccaafbf91dae986c470020faf9c0b4fba448e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83046
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/sifive/fu540/memlayout.ld | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/sifive/fu540/memlayout.ld b/src/soc/sifive/fu540/memlayout.ld index 8fc875dba7..50af4f492d 100644 --- a/src/soc/sifive/fu540/memlayout.ld +++ b/src/soc/sifive/fu540/memlayout.ld @@ -21,8 +21,8 @@ SECTIONS L2LIM_END(FU540_L2LIM + 2M) DRAM_START(FU540_DRAM) - REGION(opensbi, FU540_DRAM, 128K, 4K) - RAMSTAGE(FU540_DRAM + 128K, 2M) - MEM_STACK(FU540_DRAM + 128K + 2M, 20K) + OPENSBI(FU540_DRAM, 256K) + RAMSTAGE(FU540_DRAM + 256K, 2M) + MEM_STACK(FU540_DRAM + 256K + 2M, 20K) POSTRAM_CBFS_CACHE(FU540_DRAM + 3M, 29M) } |