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authorCliff Huang <cliff.huang@intel.com>2024-08-19 10:03:10 -0700
committerFelix Held <felix-coreboot@felixheld.de>2024-08-22 13:25:40 +0000
commit1c6548d5ccfcc550b209ac9cef401883ffdc34ff (patch)
treec005a0e4fd72b5de785306f1e16493e81d8dcf25 /src/soc
parent2d4afd8fd99b46e9f1971ef9156d4cb72a53eddf (diff)
soc/intel/common/tcss: Move AUX bias ctrl reg defines to SOC hdr
These field defines are SOC-specific. The AUX bias virtual wire field positons are shifted in PTL. In MTL SOC and older: 7:0 GROUP_ID Group ID in PCH GPIO 10:8 BIT_NUM Data bit Position in PCH GPIO 23:16 VW_INDEX VW Index in PCH GPIO In PTL SOC: 15:0 GROUP_ID Group ID in PCH GPIO; targeted SB_PORTID 18:16 BIT_NUM Data bit Position in PCH GPIO 31:24 VW_INDEX VW Index in PCH GPIO BUG=361048817 TEST=boot to OS and use iotools to read AUX Bias Ctrl register to verify the group ID, bit number, and vw index. Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I0f9c895590465b2f539c91834cf331fcd7efa996 Reviewed-on: https://review.coreboot.org/c/coreboot/+/83980 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/include/soc/tcss.h3
-rw-r--r--src/soc/intel/common/block/tcss/tcss.c2
-rw-r--r--src/soc/intel/meteorlake/include/soc/tcss.h3
-rw-r--r--src/soc/intel/tigerlake/include/soc/tcss.h3
4 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/intel/alderlake/include/soc/tcss.h b/src/soc/intel/alderlake/include/soc/tcss.h
index 825b6c78b9..079d3bc833 100644
--- a/src/soc/intel/alderlake/include/soc/tcss.h
+++ b/src/soc/intel/alderlake/include/soc/tcss.h
@@ -17,4 +17,7 @@
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 0x1088
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(x) (IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 + (x) * 4)
+#define BIAS_CTRL_VW_INDEX_SHIFT 16
+#define BIAS_CTRL_BIT_POS_SHIFT 8
+
#endif /* _SOC_TCSS_H_ */
diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c
index 5ebc12968d..1ca51a2c27 100644
--- a/src/soc/intel/common/block/tcss/tcss.c
+++ b/src/soc/intel/common/block/tcss/tcss.c
@@ -18,8 +18,6 @@
#include <soc/tcss.h>
#include <drivers/intel/pmc_mux/conn/chip.h>
-#define BIAS_CTRL_VW_INDEX_SHIFT 16
-#define BIAS_CTRL_BIT_POS_SHIFT 8
#define WAIT_FOR_DISPLAYPORT_TIMEOUT_MS 1000
#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS 1500
#define WAIT_FOR_HPD_TIMEOUT_MS 3000
diff --git a/src/soc/intel/meteorlake/include/soc/tcss.h b/src/soc/intel/meteorlake/include/soc/tcss.h
index 014e3076e6..5fa1da4539 100644
--- a/src/soc/intel/meteorlake/include/soc/tcss.h
+++ b/src/soc/intel/meteorlake/include/soc/tcss.h
@@ -13,4 +13,7 @@
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 0x1088
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(x) (IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 + (x) * 4)
+#define BIAS_CTRL_VW_INDEX_SHIFT 16
+#define BIAS_CTRL_BIT_POS_SHIFT 8
+
#endif /* _SOC_TCSS_H_ */
diff --git a/src/soc/intel/tigerlake/include/soc/tcss.h b/src/soc/intel/tigerlake/include/soc/tcss.h
index 014e3076e6..5fa1da4539 100644
--- a/src/soc/intel/tigerlake/include/soc/tcss.h
+++ b/src/soc/intel/tigerlake/include/soc/tcss.h
@@ -13,4 +13,7 @@
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 0x1088
#define IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(x) (IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET_0 + (x) * 4)
+#define BIAS_CTRL_VW_INDEX_SHIFT 16
+#define BIAS_CTRL_BIT_POS_SHIFT 8
+
#endif /* _SOC_TCSS_H_ */