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authorVinod Polimera <quic_vpolimer@quicinc.com>2023-02-03 10:55:15 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-02-13 12:37:44 +0000
commita21df149249d5ad7099d74a8e523119b493c3d44 (patch)
tree757b0a8a9980f75139351aae0e705f985a537612 /src/soc
parenta63ea89c0418e7350b3473132a4397ec5065faa8 (diff)
soc/qualcomm/sc7280: update intf timing parameter calcualtion for eDP
Correct the interface timing parameter calculation for eDP interface to avoid writing into the blanking region. BUG=b:255870643 TEST=Validated on sc7280 Zombie development board Change-Id: I069ca351d8c60d071debb23a5e48840701441977 Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72743 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/qualcomm/sc7280/display/disp.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/qualcomm/sc7280/display/disp.c b/src/soc/qualcomm/sc7280/display/disp.c
index 28356f247f..fd3ed3ced1 100644
--- a/src/soc/qualcomm/sc7280/display/disp.c
+++ b/src/soc/qualcomm/sc7280/display/disp.c
@@ -28,13 +28,15 @@ void mdss_intf_tg_setup(struct edid *edid)
hsync_period = edid->mode.ha + edid->mode.hbl;
vsync_period = edid->mode.va + edid->mode.vbl;
- display_vstart = edid->mode.vbl * hsync_period + edid->mode.hbl;
- display_vend = (vsync_period * hsync_period) - 1;
+ display_vstart = (edid->mode.vbl - edid->mode.vso) * hsync_period +
+ edid->mode.hbl - edid->mode.hso;
+ display_vend = ((vsync_period - edid->mode.vso) * hsync_period) - edid->mode.hso - 1;
hsync_ctl = (hsync_period << 16) | edid->mode.hspw;
- display_hctl = edid->mode.hbl | (hsync_period - 1) << 16;
- active_vstart = edid->mode.vbl * hsync_period;
- active_vend = display_vend;
- active_hctl = display_hctl;
+ active_vstart = display_vstart;
+ active_vend = active_vstart + (edid->mode.va * hsync_period) - 1;
+ active_hctl = ((edid->mode.hbl - edid->mode.hso + edid->mode.ha - 1) << 16) |
+ (edid->mode.hbl - edid->mode.hso);
+ display_hctl = active_hctl;
write32(&mdp_intf->intf_active_v_start_f0, active_vstart);
write32(&mdp_intf->intf_active_v_end_f0, active_vend);