diff options
author | Sean Rhodes <sean@starlabs.systems> | 2022-07-28 22:01:04 +0100 |
---|---|---|
committer | Sean Rhodes <sean@starlabs.systems> | 2022-12-22 21:17:40 +0000 |
commit | a17864c2c9b81439316a91997773f577987c1dac (patch) | |
tree | cd5072fe9773520319b02e3730175f49e8c477a0 /src/soc | |
parent | 826412212231645aee142ea61a8d60c810c68b5a (diff) |
soc/intel/apollolake/acpi: Improve comments and unify code word spelling
ACPI: Improve comments and unify code word spelling
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1efbe930d0b8daec7c7bd2c1d84a4a3a5cad2ffb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/apollolake/acpi/northbridge.asl | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 93f8184006..deda3b9771 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -Name(_HID, EISAID("PNP0A08")) /* PCIe */ -Name(_CID, EISAID("PNP0A03")) /* PCI */ +Name (_HID, EisaId("PNP0A08")) /* PCI Express Bus */ +Name (_CID, EisaId("PNP0A03")) /* PCI Bus */ Device (MCHC) { - Name (_ADR, 0x00000000) /*Dev0 Func0 */ + Name (_ADR, 0x00000000) /* Device 0 Function 0 */ OperationRegion (MCHP, PCI_Config, 0x00, 0x100) Field (MCHP, DWordAcc, NoLock, Preserve) @@ -32,22 +32,22 @@ External (A4GB, IntObj) /* Current Resource Settings */ Method (_CRS, 0, Serialized) { - Name (MCRS, ResourceTemplate() + Name (MCRS, ResourceTemplate () { /* Bus Numbers */ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, - 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,) + 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100) - /* IO Region 0 */ + /* IO Region 0: 0x0000 - 0x0cf7 */ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,) + 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8) /* PCI Config Space */ Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) - /* IO Region 1 */ + /* IO Region 1: 0x1000 - 0xffff */ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,) + 0x0000, 0x01000, 0xffff, 0x0000, 0xf000) /* * Descriptor: Legacy VGA video RAM |