diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-08-17 18:20:40 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-21 13:44:19 +0000 |
| commit | 79a688e76115a9eec63fb376e5d8067b0491a76d (patch) | |
| tree | 4e925be9e330bb5b0022965d6149ef6970cf26e7 /src/soc | |
| parent | d949bca67b8ab539c7e693e82252ddb4e2d281a0 (diff) | |
soc/intel/elkhartlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option
`SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot intel/elkhartlake_crb without any
functional impact while debugging.
Change-Id: Idb8db7230c432792e742218d41d891c529b2114f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83959
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/elkhartlake/Kconfig | 16 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/romstage/fsp_params.c | 2 |
2 files changed, 1 insertions, 17 deletions
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 42edbc63ae..815a7a1137 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -240,22 +240,6 @@ config EHL_TSN_DRIVER Enable TSN GbE driver to provide board specific settings in the GBE MAC. As an example of a possible change, the MAC address could be adjusted. -config SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT - int "Debug Consent for EHL" - # USB DBC is more common for developers so make this default to 3 if - # SOC_INTEL_DEBUG_CONSENT=y - default 3 if SOC_INTEL_DEBUG_CONSENT - default 0 - help - This is to control debug interface on SOC. - Setting non-zero value will allow to use DBC or DCI to debug SOC. - PlatformDebugConsent in FspmUpd.h has the details. - - Desired platform debug type are - 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), - 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), - 6:Enable (2-wire DCI OOB), 7:Manual - config PRERAM_CBMEM_CONSOLE_SIZE hex default 0x1400 diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c index d85f29160c..cebc48d265 100644 --- a/src/soc/intel/elkhartlake/romstage/fsp_params.c +++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c @@ -132,7 +132,7 @@ static void fill_fsp_debug_params(FSP_M_CONFIG *m_cfg, m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE; /* Set debug probe type */ - m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT; /* TraceHub configuration */ if (is_devfn_enabled(PCH_DEVFN_TRACEHUB) && config->TraceHubMode) { |