diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-02-06 21:13:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-08 15:52:56 +0000 |
| commit | 3ecf377e305e1a026ddfa66adf800a28993f4075 (patch) | |
| tree | b9b54f2a6b1ca3227766bd21573925b3aaf95a79 /src/soc | |
| parent | 8f705b9fad1f59ea370bf55c8b3b901dd89357ed (diff) | |
soc/amd: use CPUID_FROM_FMS macro instead of magic numbers
Port over the remaining AMD SoCs to use CPUID_FROM_FMS. The Glinda CPUID
still needs to be updated to the actual CPUID, but for now just change
it to use CPUID_FROM_FMS.
TEST=Resulting image of timeless build for Gardenia (Stoneyridge),
Majolica (Cezanne), Chausie (Mendocino), Mayan (Phoenix) and Birman
(Glinda) don't change.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia508f857d06f3c15e3ac9f813302471348ce3d89
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72862
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/cpu.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/glinda/include/soc/cpu.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/include/soc/cpu.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/phoenix/include/soc/cpu.h | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/cpu.c | 4 |
5 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/amd/cezanne/include/soc/cpu.h b/src/soc/amd/cezanne/include/soc/cpu.h index 926fd05de7..0239e19fe9 100644 --- a/src/soc/amd/cezanne/include/soc/cpu.h +++ b/src/soc/amd/cezanne/include/soc/cpu.h @@ -3,7 +3,7 @@ #ifndef AMD_CEZANNE_CPU_H #define AMD_CEZANNE_CPU_H -#define CEZANNE_A0_CPUID 0x00a50f00 +#define CEZANNE_A0_CPUID CPUID_FROM_FMS(0x19, 0x50, 0) #define CEZANNE_VBIOS_VID_DID 0x10021638 #define BARCELO_VBIOS_VID_DID 0x100215e7 diff --git a/src/soc/amd/glinda/include/soc/cpu.h b/src/soc/amd/glinda/include/soc/cpu.h index 42b76c8531..e7207da7f4 100644 --- a/src/soc/amd/glinda/include/soc/cpu.h +++ b/src/soc/amd/glinda/include/soc/cpu.h @@ -3,6 +3,6 @@ #ifndef AMD_GLINDA_CPU_H #define AMD_GLINDA_CPU_H -#define GLINDA_A0_CPUID 0x008a0f00 /* TODO: Update for Glinda */ +#define GLINDA_A0_CPUID CPUID_FROM_FMS(0x17, 0xa0, 0) /* TODO: Update for Glinda */ #endif /* AMD_GLINDA_CPU_H */ diff --git a/src/soc/amd/mendocino/include/soc/cpu.h b/src/soc/amd/mendocino/include/soc/cpu.h index e0202bbafe..1890306157 100644 --- a/src/soc/amd/mendocino/include/soc/cpu.h +++ b/src/soc/amd/mendocino/include/soc/cpu.h @@ -3,6 +3,6 @@ #ifndef AMD_MENDOCINO_CPU_H #define AMD_MENDOCINO_CPU_H -#define MENDOCINO_A0_CPUID 0x008a0f00 +#define MENDOCINO_A0_CPUID CPUID_FROM_FMS(0x17, 0xa0, 0) #endif /* AMD_MENDOCINO_CPU_H */ diff --git a/src/soc/amd/phoenix/include/soc/cpu.h b/src/soc/amd/phoenix/include/soc/cpu.h index 34784c4d5a..19e7a95529 100644 --- a/src/soc/amd/phoenix/include/soc/cpu.h +++ b/src/soc/amd/phoenix/include/soc/cpu.h @@ -3,7 +3,7 @@ #ifndef AMD_PHOENIX_CPU_H #define AMD_PHOENIX_CPU_H -#define PHOENIX_A0_CPUID 0x00a70f40 -#define PHOENIX2_A0_CPUID 0x00a70f80 +#define PHOENIX_A0_CPUID CPUID_FROM_FMS(0x19, 0x74, 0) +#define PHOENIX2_A0_CPUID CPUID_FROM_FMS(0x19, 0x78, 0) #endif /* AMD_PHOENIX_CPU_H */ diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index 5ecf0c6404..25549d02f3 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -60,8 +60,8 @@ static struct device_operations cpu_dev_ops = { }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, 0x660f00, CPUID_ALL_STEPPINGS_MASK }, - { X86_VENDOR_AMD, 0x670f00, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, CPUID_FROM_FMS(0x15, 0x60, 0), CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, CPUID_FROM_FMS(0x15, 0x70, 0), CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; |