bootmem: add new memory type for BL31

After CL:31122, we can finally define a memory type specific for BL31,
to make sure BL31 is not loaded on other reserved area.

Change-Id: Idbd9a7fe4b12af23de1519892936d8d88a000e2c
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://review.coreboot.org/c/31123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

6 files changed, 22 insertions, 9 deletions

diff --git a/src/soc/cavium/cn81xx/include/soc/memlayout.ld b/src/soc/cavium/cn81xx/include/soc/memlayout.ld
index e3bf61f1f4..22226176e7 100644
--- a/src/soc/cavium/cn81xx/include/soc/memlayout.ld
+++ b/src/soc/cavium/cn81xx/include/soc/memlayout.ld
@@ -22,7 +22,7 @@ SECTIONS
 {
 	DRAM_START(0x00000000)
 	/* Secure region 0 - 1MiB */
-	REGION(bl31, 0, 0xe0000, 0x1000)
+	BL31(0, 0xe0000)
 	REGION(sff8104, 0xe0000, 0x20000, 0x1000)
 
 	/* Insecure region 1MiB - TOP OF DRAM */
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 2046d21b11..4b265d7d7b 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -319,18 +319,11 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
 	return 0;
 }
 
-extern u8 _bl31[];
-extern u8 _ebl31[];
 extern u8 _sff8104[];
 extern u8 _esff8104[];
 
 void bootmem_platform_add_ranges(void)
 {
-	/* ATF reserved */
-	bootmem_add_range((uintptr_t)_bl31,
-			  ((uintptr_t)_ebl31 - (uintptr_t)_bl31),
-			  BM_MEM_RESERVED);
-
 	bootmem_add_range((uintptr_t)_sff8104,
 			  ((uintptr_t)_esff8104 - (uintptr_t)_sff8104),
 			  BM_MEM_RESERVED);
diff --git a/src/soc/mediatek/mt8173/soc.c b/src/soc/mediatek/mt8173/soc.c
index 37ceb34fd4..b5c805a595 100644
--- a/src/soc/mediatek/mt8173/soc.c
+++ b/src/soc/mediatek/mt8173/soc.c
@@ -13,10 +13,16 @@
  * GNU General Public License for more details.
  */
 
+#include <bootmem.h>
 #include <device/device.h>
 #include <symbols.h>
 #include <soc/emi.h>
 
+void bootmem_platform_add_ranges(void)
+{
+	bootmem_add_range(0x101000, 124 * KiB, BM_MEM_BL31);
+}
+
 static void soc_read_resources(struct device *dev)
 {
 	ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
diff --git a/src/soc/mediatek/mt8183/include/soc/memlayout.ld b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
index 2a6d42de63..a547083ebd 100644
--- a/src/soc/mediatek/mt8183/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
@@ -47,4 +47,6 @@ SECTIONS
 	DRAM_START(0x40000000)
 	POSTRAM_CBFS_CACHE(0x40000000, 2M)
 	RAMSTAGE(0x40200000, 256K)
+
+	BL31(0x54600000, 0x60000)
 }
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index 71532be989..619d27fb11 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -16,6 +16,7 @@
 
 #include <arch/io.h>
 #include <arch/cache.h>
+#include <bootmem.h>
 #include <bootmode.h>
 #include <bootstate.h>
 #include <console/console.h>
@@ -33,13 +34,23 @@
 
 #include "chip.h"
 
+void bootmem_platform_add_ranges(void)
+{
+	uintptr_t begin;
+	size_t size;
+	carveout_range(CARVEOUT_TZ, &begin, &size);
+	if (size == 0)
+		return;
+	bootmem_add_range(begin * MiB, size * MiB, BM_MEM_BL31);
+}
+
 static void soc_read_resources(struct device *dev)
 {
 	unsigned long index = 0;
 	int i; uintptr_t begin, end;
 	size_t size;
 
-	for (i = 0; i < CARVEOUT_NUM; i++) {
+	for (i = CARVEOUT_TZ + 1; i < CARVEOUT_NUM; i++) {
 		carveout_range(i, &begin, &size);
 		if (size == 0)
 			continue;
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
index e181a35307..01e352f230 100644
--- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
@@ -19,6 +19,7 @@
 SECTIONS
 {
 	DRAM_START(0x00000000)
+	BL31(0, 0x100000)
 	POSTRAM_CBFS_CACHE(0x00100000, 1M)
 	RAMSTAGE(0x00300000, 256K)
 	DMA_COHERENT(0x10000000, 2M)