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authorShaunak Saha <shaunak.saha@intel.com>2016-08-22 21:55:23 -0700
committerAaron Durbin <adurbin@chromium.org>2016-08-25 23:43:50 +0200
commitd6bb5495f94a6675b30e21d80c1c09559b2309ab (patch)
tree656b2bb78488e12a90d375d1f82da47ae5e55c5e /src/soc
parentf7ce40baf6a26e70ca18026f26977cd7f6f2cefa (diff)
intel/apollolake: Add power management utility function
This patch adds a power management utility function to clear wake status bits in ACPI GPE0 registers. We need to call this function before going to sleep from common smi handler function. BUG=chrome-os-partner:55583 BRANCH=None TEST=Verified that system goes to sleep on lidclose and powerd_dbus_suspend command issued from built-in keyboard. Change-Id: Icd095d377c82f2e154f2e2db773f737aa49cda64 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/16298 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h1
-rw-r--r--src/soc/intel/apollolake/pmutil.c10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 5641e54c50..7eb593002e 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -173,6 +173,7 @@ uint16_t clear_pm1_status(void);
uint32_t clear_tco_status(void);
uint32_t clear_gpe_status(void);
void clear_pmc_status(void);
+void clear_gpi_gpe_sts(void);
uint32_t get_smi_en(void);
void enable_smi(uint32_t mask);
void disable_smi(uint32_t mask);
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index aaa4018683..39edc45886 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -246,6 +246,16 @@ void disable_all_gpe(void)
disable_gpe(~0);
}
+/* Clear the gpio gpe0 status bits in ACPI registers */
+void clear_gpi_gpe_sts(void)
+{
+ int i;
+
+ for (i = 1; i < GPE0_REG_MAX; i++) {
+ uint32_t gpe_sts = inl(ACPI_PMIO_BASE + GPE0_STS(i));
+ outl(gpe_sts, ACPI_PMIO_BASE + GPE0_STS(i));
+ }
+}
static uint32_t reset_gpe_status(void)
{