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authorRob Barnes <robbarnes@google.com>2020-08-14 15:21:35 -0600
committerAaron Durbin <adurbin@chromium.org>2020-08-28 14:29:44 +0000
commit8283ae6bab2131ff5d5b70155d6f91e39d3ef6ac (patch)
tree2e48c301d58e326239f2ceb5abd5b8c9b297cc07 /src/soc
parent913ea9278f50b73427a50a54e91f8d5502d93219 (diff)
util: Add memory parts needed by zork boards
Add memory parts needed by zork boards. Attributes are derived from data sheets. BUG=b:162939176 TEST=Compared generated SPDs with data sheets and checked in SPDs Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I67f205f9af24bbc5c12656be1f363a15fe975955 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44447 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-3.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-4.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-5.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-6.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-7.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4-spd-8.hex32
-rw-r--r--src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt11
7 files changed, 203 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-3.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-3.hex
new file mode 100644
index 0000000000..d2869eab1b
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-3.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 45 21 00 08 00 00 00 00 02 03 00 00
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diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-4.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-4.hex
new file mode 100644
index 0000000000..b6769928da
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-4.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00
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diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-5.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-5.hex
new file mode 100644
index 0000000000..d72bf1ed05
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-5.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 85 21 00 08 00 00 00 00 01 03 00 00
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diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-6.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-6.hex
new file mode 100644
index 0000000000..71cfff96d5
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-6.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00
+00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A
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diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-7.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-7.hex
new file mode 100644
index 0000000000..7f92cd8529
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-7.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 46 29 00 08 00 00 00 00 02 03 00 00
+00 00 05 06 F8 FF 02 00 6E 6E 6E 11 00 6E F0 0A
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diff --git a/src/soc/intel/tigerlake/spd/ddr4-spd-8.hex b/src/soc/intel/tigerlake/spd/ddr4-spd-8.hex
new file mode 100644
index 0000000000..aca688e99d
--- /dev/null
+++ b/src/soc/intel/tigerlake/spd/ddr4-spd-8.hex
@@ -0,0 +1,32 @@
+23 11 0C 03 46 29 00 08 00 00 00 00 02 03 00 00
+00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A
+20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00
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diff --git a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
index 22fce5c302..13de1cd706 100644
--- a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
+++ b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
@@ -1,3 +1,14 @@
H5AN8G6NDJR-XNC,ddr4-spd-1.hex
MT40A512M16TB-062E:J,ddr4-spd-1.hex
H5ANAG6NCMR-XNC,ddr4-spd-2.hex
+HMA851S6CJR6N-VK,ddr4-spd-3.hex
+K4A8G165WC-BCTD,ddr4-spd-3.hex
+H5AN8G6NCJR-VKC,ddr4-spd-3.hex
+MT40A1G16KNR-075:E,ddr4-spd-4.hex
+K4AAG165WB-MCTD,ddr4-spd-5.hex
+H5ANAG6NCMR-VKC,ddr4-spd-6.hex
+K4A8G165WC-BCWE,ddr4-spd-1.hex
+MT40A1G16KD-062E:E,ddr4-spd-7.hex
+K4AAG165WA-BCWE,ddr4-spd-7.hex
+H5AN8G6NCJR-XNC,ddr4-spd-1.hex
+K4AAG165WA-BCTD,ddr4-spd-8.hex