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authorArthur Heymans <arthur@aheymans.xyz>2020-12-16 21:55:17 +0100
committerHung-Te Lin <hungte@chromium.org>2020-12-21 02:37:13 +0000
commit45a6ae35ef9c605ff3ce47f98b8cfe53cccbdf7d (patch)
tree164e7c1a66a046ba497dd7f5df42b27cbee0e15d /src/soc
parent08d8dd3bd3c08ae99b40ea5ee14c3c54a6546590 (diff)
soc/intel/xeon_sp/skx: Properly set up MTRR's
Don't depend on the MTRR setup left over from FSP-M ExitTempRam. Change-Id: I299123b3cd3c37b4345102c20fda77bf261892a2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/xeon_sp/skx/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index d36f11be66..f9cd356efc 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -193,7 +193,8 @@ static void pre_mp_init(void)
{
printk(BIOS_DEBUG, "%s: entry\n", __func__);
- x86_setup_fixed_mtrrs();
+ x86_setup_mtrrs_with_detect();
+ x86_mtrr_check();
}
static void post_mp_init(void)