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author | Bora Guvendik <bora.guvendik@intel.com> | 2023-09-20 13:52:06 -0700 |
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committer | Nick Vaccaro <nvaccaro@google.com> | 2023-10-16 22:19:52 +0000 |
commit | d353d7e724a6501917a07e756a40bc72853003a0 (patch) | |
tree | a529647a02599603242970fc346f17e23876e2ac /src/soc/ucb/riscv/chip.c | |
parent | 76a3d77f323b4c7210a712d9c64c3073485b9b98 (diff) |
soc/intel/alderlake: Add config for Client RPL FSP support
For Raptor Lake, select Raptor Lake's .fd file and header.
TEST=Boot to OS on Google Brya board with RPL silicon.
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ib3172b06b23e19be453142af764dd027bfe8043d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/ucb/riscv/chip.c')
0 files changed, 0 insertions, 0 deletions