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| author | Felix Held <felix-coreboot@felixheld.de> | 2024-02-01 20:50:11 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-02 20:37:50 +0000 |
| commit | 953d7d979b9d358636df0504d18f1ed5d6fdc265 (patch) | |
| tree | 79ec084d2515cef6add57fb03beee0646e00ca7f /src/soc/sifive | |
| parent | 5dc83818b8d14950bf10451f75901b52108b0697 (diff) | |
soc/amd/phoenix/fch: only init ACPI IO ports in FSP case
Since openSIL configures the APCI IO port addresses, coreboot should not
overwrite them.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If10e5a9f52ab313ad1afebd7f9e722994d48b0a7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80297
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/sifive')
0 files changed, 0 insertions, 0 deletions