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authorJonathon Hall <jonathon.hall@puri.sm>2023-09-27 12:50:59 -0400
committerMatt DeVillier <matt.devillier@gmail.com>2023-10-20 14:19:52 +0000
commiteb834d9d13d749fe8a4883e84a7d714eedef08db (patch)
tree92e74a51dd81a95d27f2db0a9e82696001669955 /src/soc/rockchip/common/include
parent4ed3ea668c3933deb01c02d33613c764e257671a (diff)
drivers/intel/fsp2_0: Support embedding a second FSP-M/FSP-S
Support embedding a second FSP-M/FSP-S binary for an SoC that can select one at runtime. Comet Lake v1 and v2 are different steppings of the same SKUs, but they require different FSP binaries. Supporting both in a single build requires embedding both FSPs and selecting one at runtime based on the CPUID. This is desirable for a product that may have different CPU steppings but is not otherwise differentiated enough for a separate firmware build. An SoC can select PLATFORM_USES_SECOND_FSP to indicate that two FSP-M/ FSP-S binaries are required. Implement soc_select_fsp_m_cbfs() and soc_select_fsp_s_cbfs() to choose one based on platform-specific criteria. For Comet Lake, the first FSP is CML v1 and the second is CML v2, but in principle a platform could define any meaning for the first and second FSP. FSP-T is not affected, only one FSP-T can be embedded if FSP_CAR is used. Only one set of FSP headers is used, which is sufficient for Comet Lake v1/v2; their headers are equivalent. ADD_FSP_BINARIES, FSP_USE_REPO, and FSP_FULL_FD are supported for both sets of FSP-S/FSP-M but cannot be configured separately, both use the same configuration. Change-Id: Ied4c6c49a6bdf278238272edd47a2006258be8e5 Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78344 Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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