src/soc/qualcomm: Add include <types.h>

BIT(x) needs <types.h>.

Change-Id: I6b89bd9616b3f091d6694f9cc20b4bd1a74aad3b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

4 files changed, 4 insertions, 1 deletions

diff --git a/src/soc/qualcomm/ipq40xx/include/soc/clock.h b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
index 2b48a2c484..6859b1f1a7 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
@@ -5,6 +5,7 @@
 #define __IPQ40XX_CLOCK_H_
 
 #include <soc/iomap.h>
+#include <types.h>
 
 /* UART clock @ 7.3728 MHz */
 #define UART_DM_CLK_RX_TX_BIT_RATE 0xFF
diff --git a/src/soc/qualcomm/qcs405/usb.c b/src/soc/qualcomm/qcs405/usb.c
index 3820e1371e..738e56fb05 100644
--- a/src/soc/qualcomm/qcs405/usb.c
+++ b/src/soc/qualcomm/qcs405/usb.c
@@ -5,6 +5,7 @@
 #include <delay.h>
 #include <soc/usb.h>
 #include <soc/clock.h>
+#include <types.h>
 
 /* USB BASE ADDRESS */
 #define USB_HOST0_DWC3_BASE		0x758C100
diff --git a/src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h b/src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h
index 9f5806f4b9..9df5102114 100644
--- a/src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h
+++ b/src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h
@@ -7,8 +7,8 @@
 #include <device/mmio.h>
 #include <gpio.h>
 #include <soc/addressmap.h>
-#include <stdint.h>
 #include <timer.h>
+#include <types.h>
 
 #define GENMASK(h, l)	(BIT(h + 1) - BIT(l))
 
diff --git a/src/soc/qualcomm/sc7180/qupv3_spi.c b/src/soc/qualcomm/sc7180/qupv3_spi.c
index c3827ef325..a145417f35 100644
--- a/src/soc/qualcomm/sc7180/qupv3_spi.c
+++ b/src/soc/qualcomm/sc7180/qupv3_spi.c
@@ -8,6 +8,7 @@
 #include <soc/qcom_qup_se.h>
 #include <soc/qupv3_config.h>
 #include <soc/qupv3_spi.h>
+#include <types.h>
 
 /* SE_SPI_LOOPBACK register fields */
 #define LOOPBACK_ENABLE	0x1