diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-25 21:07:59 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:09:42 +0200 |
commit | 4a83f1cf24b793db40606febb8e27cee90452590 (patch) | |
tree | 74943b190d2aa7c97da72d59f816157d4bc947e9 /src/soc/qualcomm | |
parent | 3c80408fc8aa7b4099493acd7420f8d62ce65a48 (diff) |
src/soc: Add required space before opening parenthesis '('
Change-Id: Ifc47f103492a2cd6c818dfd64be971d34afbe0a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16324
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/qualcomm')
-rw-r--r-- | src/soc/qualcomm/ipq806x/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/clock.c b/src/soc/qualcomm/ipq806x/clock.c index d30771fb2e..7b46ef9dd8 100644 --- a/src/soc/qualcomm/ipq806x/clock.c +++ b/src/soc/qualcomm/ipq806x/clock.c @@ -14,7 +14,7 @@ void uart_pll_vote_clk_enable(unsigned int clk_dummy) setbits_le32(BB_PLL_ENA_SC0_REG, BIT(8)); if (!clk_dummy) - while((read32(PLL_LOCK_DET_STATUS_REG) & BIT(8)) == 0); + while ((read32(PLL_LOCK_DET_STATUS_REG) & BIT(8)) == 0); } /** |