diff options
| author | Deepa Dinamani <deepad@codeaurora.org> | 2014-05-01 11:20:49 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-15 21:55:29 +0200 |
| commit | 55e2f393a7fbc86b00404d5a7651525f9077a342 (patch) | |
| tree | 89af97aca732b3ea8f6b1746efa02a2a946e1b80 /src/soc/qualcomm | |
| parent | 81193e6cd82b464aece48f35e45fae8742114cee (diff) | |
soc/ipq806x: Disable LPAE mode.
LPAE (large physical address extension) is not available on this SOC
core, do not enable it.
[pg: we already had this one, but somehow LPAE slipped in again]
BUG=chrome-os-partner:27784
TEST=coreboot still comes up on AP148
Change-Id: Iaa80022c611f7377d8f4100487d32654150836d8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e6e12c39efd54e4fcbd444134bf30e211948a71b
Original-Change-Id: I9e9ad1aeaf613f04987c0c306a574085042d0e7b
Original-Signed-off-by: Deepa Dinamani <deepad@codeaurora.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/198023
Original-Reviewed-by: deepa dinamani <deepad@quicinc.com>
Reviewed-on: http://review.coreboot.org/9682
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 4f6ad1fec1..ce7a16e274 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -5,7 +5,6 @@ config SOC_QC_IPQ806X select ARCH_VERSTAGE_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 - select ARM_LPAE select BOOTBLOCK_CONSOLE select DYNAMIC_CBMEM select HAVE_UART_SPECIAL |