diff options
author | Zebreus <lennarteichhorn@googlemail.com> | 2023-11-13 23:34:03 +0100 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-11-15 08:07:34 +0000 |
commit | 94ac1b1f03d330f9db139894dd3a4cec0d0949e5 (patch) | |
tree | 0f527a6c959fa1b95f0cb428154f884a3f80f0e7 /src/soc/qualcomm/sc7280/include | |
parent | 9ba7bada0890671654f534715c134d0259ca55c3 (diff) |
soc/qualcomm/{sc7180,sc7280}: Use correct return types for functions
Some functions in the headers for sc7180 and sc7280 specified the
int as their return type when they should have used enum cb_err.
Found while testing GCC 13.2.0
Change-Id: I41331fe708a396f7f2f40359e8ba03c8a46a4d4b
Signed-off-by: Zebreus <lennarteichhorn@googlemail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7280/include')
-rw-r--r-- | src/soc/qualcomm/sc7280/include/soc/clock.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/qualcomm/sc7280/include/soc/clock.h b/src/soc/qualcomm/sc7280/include/soc/clock.h index d22ba37307..402c898c4b 100644 --- a/src/soc/qualcomm/sc7280/include/soc/clock.h +++ b/src/soc/qualcomm/sc7280/include/soc/clock.h @@ -383,14 +383,14 @@ void clock_enable_qup(int qup); void clock_configure_sdcc1(uint32_t hz); void clock_configure_sdcc2(uint32_t hz); void clock_configure_dfsr(int qup); -int clock_enable_gdsc(enum clk_gdsc gdsc_type); +enum cb_err clock_enable_gdsc(enum clk_gdsc gdsc_type); -int mdss_clock_configure(enum clk_mdss clk_type, uint32_t hz, +enum cb_err mdss_clock_configure(enum clk_mdss clk_type, uint32_t hz, uint32_t source, uint32_t divider, uint32_t m, uint32_t n, uint32_t d); -int mdss_clock_enable(enum clk_mdss clk_type); -int clock_enable_pcie(enum clk_pcie clk_type); -int clock_configure_mux(enum clk_pcie clk_type, u32 src_type); +enum cb_err mdss_clock_enable(enum clk_mdss clk_type); +enum cb_err clock_enable_pcie(enum clk_pcie clk_type); +enum cb_err clock_configure_mux(enum clk_pcie clk_type, u32 src_type); /* Subsystem Reset */ static struct aoss *const aoss = (void *)AOSS_CC_BASE; |