diff options
| author | Eran Mitrani <mitrani@google.com> | 2023-01-30 09:15:57 -0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2023-02-01 14:59:47 +0000 |
| commit | bc7239424c239d7e5415a25e45651ad720c6aa41 (patch) | |
| tree | 40a2273105bb46e7f33c4c8a5562e684f5aaba77 /src/soc/qualcomm/sc7180/mmu.c | |
| parent | 985acc218bf9e3f5ed6a386cf43feecd432365fb (diff) | |
soc/intel/mtl: remove DPTF from D-states list used to enter LPM
The D-state list lists the devices with the corresponding
D-state that the devices should be in, in order to enter LPM.
DPTF is not mentioned in Intel's document 595644 as one of
the devices.
This CL removes it to avoid a potential error seen in ADL
devices as mentioned in commit 3fd5b0c4cdeb ("soc/intel/adl:
remove DPTF from D-states list used to enter LPM")
TEST=Built and tested on Rex, saw SSDT generated properly.
BUG=b:231582182
Signed-off-by: Eran Mitrani <mitrani@google.com>
Change-Id: I9192ed9a7fb59ebba14f6d5082b400534b16ca72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72603
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/mmu.c')
0 files changed, 0 insertions, 0 deletions