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author | Felix Held <felix-coreboot@felixheld.de> | 2021-05-28 17:59:09 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-08 18:24:00 +0000 |
commit | f0c52768f38da98c3abecd294ec4904e48170315 (patch) | |
tree | 6d7edf431e8c0d159a3ced1b8605968ad0b930da /src/soc/nvidia/tegra210/mtc.c | |
parent | a389b3cb4d45d8dec770109f50054fca4c708a28 (diff) |
soc/amd: factor out acpi_soc_get_bert_region to amd/common
This also adds BERT table gerenation support for Cezanne, but since the
functionality to populate the BERT memory region isn't implemented yet,
this won't result in a BERT table being generated on Cezanne, since
bert_generate_ssdt will always return false there.
TEST=BERT ACPI table generation still works on AMD/Mandolin
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I69b4a9a7432041e1f4902436fa4e6dee5332dbd2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/nvidia/tegra210/mtc.c')
0 files changed, 0 insertions, 0 deletions