timer: Add generic udelay() implementation

Add GENERIC_UDELAY Kconfig option so that a generic
udelay() implementation is provided utilizing the
monotonic timer. That way each board/chipset doesn't
need to duplicate the same udelay(). Additionally,
assume that GENERIC_UDELAY implies init_timer()
is not required.

BUG=None
BRANCH=None
TEST=Built nyan, ryu, and rambi. May need help testing.

Change-Id: I7f511a2324b5aa5d1b2959f4519be85a6a7360e8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1a85fbcad778933d13eaef545135abe7e4de46ed
Original-Change-Id: Idd26de19eefc91ee3b0ceddfb1bc2152e19fd8ab
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/219719
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9334
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

3 files changed, 1 insertions, 48 deletions

diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index c87698a8d2..0a1b28be66 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -8,6 +8,7 @@ config SOC_NVIDIA_TEGRA132
 	select BOOTBLOCK_CONSOLE
 	select GIC
 	select HAVE_MONOTONIC_TIMER
+	select GENERIC_UDELAY
 	select HAVE_HARD_RESET
 	select HAVE_UART_SPECIAL
 	select HAVE_UART_MEMORY_MAPPED
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index 81d08f54df..8ad9b83059 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -1,7 +1,6 @@
 bootblock-y += bootblock.c
 bootblock-y += bootblock_asm.S
 bootblock-y += cbfs.c
-bootblock-y += timer.c
 bootblock-y += clock.c
 bootblock-y += spi.c
 bootblock-y += i2c.c
@@ -26,7 +25,6 @@ romstage-y += romstage_asm.S
 romstage-y += addressmap.c
 romstage-y += cbfs.c
 romstage-y += cbmem.c
-romstage-y += timer.c
 romstage-y += ccplex.c
 romstage-y += clock.c
 romstage-y += cpu.c
@@ -53,7 +51,6 @@ ramstage-y += cbfs.c
 ramstage-y += cbmem.c
 ramstage-y += cpu.c
 ramstage-y += cpu_lib.S
-ramstage-y += timer.c
 ramstage-y += clock.c
 ramstage-y += soc.c
 ramstage-y += spi.c
diff --git a/src/soc/nvidia/tegra132/timer.c b/src/soc/nvidia/tegra132/timer.c
deleted file mode 100644
index ed10340040..0000000000
--- a/src/soc/nvidia/tegra132/timer.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <timer.h>
-#include <delay.h>
-#include <thread.h>
-
-void init_timer(void)
-{
-}
-
-void udelay(unsigned usec)
-{
-	struct stopwatch sw;
-
-	/*
-	 * As the hardware clock granularity is in microseconds pad the
-	 * requested delay by one to get at least >= requested usec delay.
-	 */
-	usec += 1;
-
-	if (!thread_yield_microseconds(usec))
-		return;
-
-	stopwatch_init_usecs_expire(&sw, usec);
-	while (!stopwatch_expired(&sw))
-		;
-}