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authorMartin Roth <martin@coreboot.org>2021-10-01 14:53:22 -0600
committerMartin Roth <martinroth@google.com>2021-10-05 18:07:08 +0000
commit26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch)
tree8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/soc/nvidia/tegra124
parent50863daef8ed75c0cb3dfd375e7622c898de5821 (diff)
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124')
-rw-r--r--src/soc/nvidia/tegra124/chip.h2
-rw-r--r--src/soc/nvidia/tegra124/dp.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra124/chip.h b/src/soc/nvidia/tegra124/chip.h
index 0d1fb19dd2..bc033c9f35 100644
--- a/src/soc/nvidia/tegra124/chip.h
+++ b/src/soc/nvidia/tegra124/chip.h
@@ -54,7 +54,7 @@ struct soc_nvidia_tegra124_config {
/* Delay before from power on asserting vdd */
int vdd_delay_ms;
- /* Delay beween pwm and backlight_en_gpio is asserted */
+ /* Delay between pwm and backlight_en_gpio is asserted */
int pwm_to_bl_delay_ms;
/* Delay before HPD high */
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index 4155c34b21..5da2c066f5 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -465,7 +465,7 @@ static int _tegra_dp_lower_link_config(struct tegra_dc_dp_data *dp,
return (cfg->lane_count > 0) ? DP_LT_SUCCESS : DP_LT_FAILED;
}
-/* Calcuate if given cfg can meet the mode request. */
+/* Calculate if given cfg can meet the mode request. */
/* Return true if mode is possible, false otherwise. */
static int tegra_dc_dp_calc_config(struct tegra_dc_dp_data *dp,
const struct soc_nvidia_tegra124_config *config,