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authorJarried Lin <jarried.lin@mediatek.corp-partner.google.com>2024-02-05 18:29:12 +0800
committerYu-Ping Wu <yupingso@google.com>2024-11-11 07:01:37 +0000
commite1bfeeab411f017068ee2fcc9b4ffecadfd0d19b (patch)
tree0885967c68e9974eb30943cffced073e740df830 /src/soc/mediatek
parent80a53a8e5a2ee0074f6fe1b35311321ca2ecf372 (diff)
soc/mediatek/common: Increase DEV_MEM memory range to 16GB
Map a proper DRAM range for memory test during calibration. TEST=memory test passed on Rauru BUG=b:317009620 Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com> Change-Id: I06f31ef14715897ba889076d78b8c2d015dd08ef Reviewed-on: https://review.coreboot.org/c/coreboot/+/85035 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/common/mmu_operations.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index cbd6c094dd..be216f6be7 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -19,11 +19,11 @@ void mtk_mmu_init(void)
mmu_init();
/*
- * Set 0x0 to 8GB address as device memory. We want to config IO_PHYS
+ * Set 0x0 to 16GB address as device memory. We want to config IO_PHYS
* address to DEV_MEM, and map a proper range of dram for the memory
* test during calibration.
*/
- mmu_config_range((void *)0, (uintptr_t)8U * GiB, DEV_MEM);
+ mmu_config_range((void *)0, (uintptr_t)16U * GiB, DEV_MEM);
/* SRAM is cached */
mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);