diff options
author | Hung-Te Lin <hungte@chromium.org> | 2018-06-26 13:42:04 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-26 11:34:05 +0000 |
commit | 03e9cb9b35a33f29d3fb0039960237eaea2f7ce6 (patch) | |
tree | 06b6ff31159aff1da9e9938441a2aa17fe060eff /src/soc/mediatek | |
parent | 4c067c85507c786a661642c10583c71b80a9855c (diff) |
mediatek/mt8183: Enable bootblock self-decompression
MT8183 only allows booting from eMMC, so we have to do eMMC emulation
from an external source, for example EC, which makes the size of
bootblock very important.
A fully functional bootblock (that can boot into verstage or romstage)
is about 38000 bytes. If self decompression (CONFIG_COMPRESS_BOOTBLOCK)
is enabled, only 25088 (66%) bytes are needed.
Inspired from crosreview.com/1070018.
BUG=b:80501386
TEST=manually flashed into kukui and boots into romstage.
Change-Id: I7a739866a4ea3bcafe2ff7b9e88d5ed00f3f3e40
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/27599
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r-- | src/soc/mediatek/mt8183/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/mediatek/mt8183/Makefile.inc | 4 | ||||
-rw-r--r-- | src/soc/mediatek/mt8183/bootblock.c | 1 | ||||
-rw-r--r-- | src/soc/mediatek/mt8183/decompressor.c | 22 | ||||
-rw-r--r-- | src/soc/mediatek/mt8183/include/soc/memlayout.ld | 6 |
5 files changed, 30 insertions, 4 deletions
diff --git a/src/soc/mediatek/mt8183/Kconfig b/src/soc/mediatek/mt8183/Kconfig index 040e69219e..b58be7ff88 100644 --- a/src/soc/mediatek/mt8183/Kconfig +++ b/src/soc/mediatek/mt8183/Kconfig @@ -10,6 +10,7 @@ config SOC_MEDIATEK_MT8183 select GENERIC_UDELAY select HAVE_UART_SPECIAL select HAVE_MONOTONIC_TIMER + select COMPRESS_BOOTBLOCK if SOC_MEDIATEK_MT8183 diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index 1ae534f908..752395da40 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -11,6 +11,10 @@ bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif bootblock-y += ../common/wdt.c +decompressor-y += decompressor.c +decompressor-y += ../common/mmu_operations.c +decompressor-y += ../common/timer.c + verstage-y += ../common/gpio.c gpio.c verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-y += ../common/timer.c diff --git a/src/soc/mediatek/mt8183/bootblock.c b/src/soc/mediatek/mt8183/bootblock.c index f8e059b68f..4e05e185b2 100644 --- a/src/soc/mediatek/mt8183/bootblock.c +++ b/src/soc/mediatek/mt8183/bootblock.c @@ -20,7 +20,6 @@ void bootblock_soc_init(void) { - mtk_mmu_init(); mt_pll_init(); mtk_wdt_init(); } diff --git a/src/soc/mediatek/mt8183/decompressor.c b/src/soc/mediatek/mt8183/decompressor.c new file mode 100644 index 0000000000..d4a55b36c1 --- /dev/null +++ b/src/soc/mediatek/mt8183/decompressor.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <soc/mmu_operations.h> + +void decompressor_soc_init(void) +{ + mtk_mmu_init(); +} diff --git a/src/soc/mediatek/mt8183/include/soc/memlayout.ld b/src/soc/mediatek/mt8183/include/soc/memlayout.ld index f44c74b0e5..f148eed519 100644 --- a/src/soc/mediatek/mt8183/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8183/include/soc/memlayout.ld @@ -39,9 +39,9 @@ SECTIONS SRAM_END(0x00120000) SRAM_L2C_START(0x00200000) - BOOTBLOCK(0x00201000, 85K) - VERSTAGE(0x00217000, 114K) - ROMSTAGE(0x00233800, 92K) + OVERLAP_DECOMPRESSOR_ROMSTAGE(0x000201000, 92K) + BOOTBLOCK(0x00227000, 89K) + VERSTAGE(0x0023E000, 114K) SRAM_L2C_END(0x00280000) DRAM_START(0x40000000) |