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authorTim Crawford <tcrawford@system76.com>2024-05-09 07:29:36 -0600
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-05-28 20:01:10 +0000
commit5d1494adda44dfaa0167aaa2f024c4ab351a82ad (patch)
treec73abd3de98872860c3d10b61ade6ad8e84899c8 /src/soc/mediatek/mt8195/spi.c
parent5a8c11e2aa2bded176bdba1317dc411d9e4a1630 (diff)
mb/system76/tgl: Update VBTs to version 250
Commit 4c7e97b26a34 ("Update fsp submodule to upstream master branch") included an update to the VBT from 240 to 250, breaking parsing of existing VBTs. After that commit, the VBT was parsed as (from gaze16-3060-b): [DEBUG] PCI: 00:02.0 init [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [INFO ] framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32 [INFO ] x_res x y_res: 1024 x 768, size: 3145728 at 0xd0000000 [DEBUG] PCI: 00:02.0 init finished in 6 msecs When the expected output is: [DEBUG] PCI: 00:00:02.0 init [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 [INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000 [DEBUG] PCI: 00:00:02.0 init finished in 6 msecs Generate blobs for the new version using Intel Display Configuration Tool (DisCon) v3.3, based on the existing 237 and 240 VBTs. (For our edk2 payload, the UEFI GOP driver was updated to 17.0.1077.) Tested on all affected systems: - darp7 - galp5 - gaze16-3050 - gaze16-3060 - gaze16-3060-b - lemp10 - oryp8 Tested: - Boot splash displays on screen again - Firmware setup menu is rendered, at correct resolution Change-Id: I918356d9f660b985ee4408ef77544fbd071ab35f Signed-off-by: Tim Crawford <tcrawford@system76.com> Tested-by: Daniel Sutton <daniel@system76.com> Tested-by: Jacob Kauffmann <jacob@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82246 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/mediatek/mt8195/spi.c')
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