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author | Arthur Heymans <arthur@aheymans.xyz> | 2021-06-10 15:33:56 +0200 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2021-06-16 06:05:34 +0000 |
commit | 06eecfea969649202b4a20381f4d24db4eb9d3bd (patch) | |
tree | d87971ea374724b62640d7b99008d66f678faf78 /src/soc/mediatek/mt8195/include | |
parent | dfb6a0b1a3f03ca71ba684bc212fc5a8b52962f0 (diff) |
soc/intel/denverton_ns: Remove SOC specific FSP location overrides
1) FSP-S should not run XIP
2) Overriding the FSP-T location conflicts with the location set in
drivers/intel/fsp2_0
This fixes a regression caused by commit
0f068a600e (drivers/intel/fsp2_0: Fix the FSP-T position)
Link: https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/G6WRFITANOS2JEYG3GKB2ZNVCLUZ6W7P/
Change-Id: I381781c1de7c6dad32d66b295c927419dea7d8be
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mariusz SzafraĆski <mariuszx.szafranski@intel.com>
Reviewed-by: King Sumo <kingsumos@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
0 files changed, 0 insertions, 0 deletions