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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-07-11 15:01:51 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-07-12 14:40:48 +0000
commit13c8d024c2a5d7d8874d1acf0b30baabb0abd756 (patch)
tree9a255110a81df8094be3fe8fba896e0762b2ba7b /src/soc/mediatek/common
parent2680eec0cd2b300c4738091555fa98e87f0af052 (diff)
soc/mediatek: Add mt_pll_set_usb_clock() to enable usb clock
There are clock settings for usb in mt8195 and mt8188, so we add a new function which is implemented in pll.c to do this. TEST=build pass BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I40b358b197541bc5281645879553340059829db3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65750 Reviewed-by: Yidi Lin <yidilin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/include/soc/pll_common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/pll_common.h b/src/soc/mediatek/common/include/soc/pll_common.h
index 2ebb71aa2e..6eac8b282a 100644
--- a/src/soc/mediatek/common/include/soc/pll_common.h
+++ b/src/soc/mediatek/common/include/soc/pll_common.h
@@ -72,6 +72,7 @@ void mt_pll_raise_little_cpu_freq(u32 freq);
void mt_pll_raise_cci_freq(u32 freq);
void mt_pll_set_tvd_pll1_freq(u32 freq);
void edp_mux_set_sel(u32 sel);
+void mt_pll_set_usb_clock(void);
enum fmeter_type {
FMETER_ABIST = 0,