diff options
author | Chuanjia Liu <Chuanjia.Liu@mediatek.com> | 2018-11-26 14:20:09 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 13:34:57 +0000 |
commit | 3a065f1a76feb4f23af6708caef5f912292610fd (patch) | |
tree | 5b159ceadd0fdf6aaa1b60b139c0fda7e5a0b5c8 /src/soc/mediatek/common | |
parent | d5d20d03fea5d50152fac783cb0985dbaa66d782 (diff) |
mediatek: Share GPIO external interrupts (EINT) code among similar SoCs
Refactor GPIO EINT code which can be reused among similar SoCs.
BUG=b:80501386
BRANCH=none
TEST=emerge-elm coreboot; emerge-kukui coreboot
Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/29837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r-- | src/soc/mediatek/common/gpio.c | 61 | ||||
-rw-r--r-- | src/soc/mediatek/common/include/soc/gpio_common.h | 59 |
2 files changed, 120 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/gpio.c b/src/soc/mediatek/common/gpio.c index 590f8ea461..371ff266d7 100644 --- a/src/soc/mediatek/common/gpio.c +++ b/src/soc/mediatek/common/gpio.c @@ -126,3 +126,64 @@ void gpio_output(gpio_t gpio, int value) gpio_set_dir(gpio, GPIO_DIRECTION_OUT); gpio_set_mode(gpio, GPIO_MODE); } + +enum { + MAX_EINT_REG_BITS = 32, +}; + +static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit) +{ + *pos = gpio.id / MAX_EINT_REG_BITS; + *bit = gpio.id % MAX_EINT_REG_BITS; +} + +int gpio_eint_poll(gpio_t gpio) +{ + u32 pos; + u32 bit; + u32 status; + + pos_bit_calc_for_eint(gpio, &pos, &bit); + + status = (read32(&mtk_eint->sta.regs[pos]) >> bit) & 0x1; + + if (status) + write32(&mtk_eint->ack.regs[pos], 1 << bit); + + return status; +} + +void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type) +{ + u32 pos; + u32 bit, mask; + + pos_bit_calc_for_eint(gpio, &pos, &bit); + mask = 1 << bit; + + /* Make it an input first. */ + gpio_input_pullup(gpio); + + write32(&mtk_eint->d0en[pos], mask); + + switch (type) { + case IRQ_TYPE_EDGE_FALLING: + write32(&mtk_eint->sens_clr.regs[pos], mask); + write32(&mtk_eint->pol_clr.regs[pos], mask); + break; + case IRQ_TYPE_EDGE_RISING: + write32(&mtk_eint->sens_clr.regs[pos], mask); + write32(&mtk_eint->pol_set.regs[pos], mask); + break; + case IRQ_TYPE_LEVEL_LOW: + write32(&mtk_eint->sens_set.regs[pos], mask); + write32(&mtk_eint->pol_clr.regs[pos], mask); + break; + case IRQ_TYPE_LEVEL_HIGH: + write32(&mtk_eint->sens_set.regs[pos], mask); + write32(&mtk_eint->pol_set.regs[pos], mask); + break; + } + + write32(&mtk_eint->mask_clr.regs[pos], mask); +} diff --git a/src/soc/mediatek/common/include/soc/gpio_common.h b/src/soc/mediatek/common/include/soc/gpio_common.h index 22acd92fe6..374c810313 100644 --- a/src/soc/mediatek/common/include/soc/gpio_common.h +++ b/src/soc/mediatek/common/include/soc/gpio_common.h @@ -16,6 +16,10 @@ #ifndef SOC_MEDIATEK_COMMON_GPIO_H #define SOC_MEDIATEK_COMMON_GPIO_H +#include <soc/gpio_base.h> +#include <stddef.h> +#include <stdint.h> + enum pull_enable { GPIO_PULL_DISABLE = 0, GPIO_PULL_ENABLE = 1, @@ -26,4 +30,59 @@ enum pull_select { GPIO_PULL_UP = 1, }; +void gpio_set_pull(gpio_t gpio, enum pull_enable enable, + enum pull_select select); +void gpio_set_mode(gpio_t gpio, int mode); + +enum gpio_irq_type { + IRQ_TYPE_EDGE_RISING, + IRQ_TYPE_EDGE_FALLING, + IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_LEVEL_LOW, +}; + +struct eint_section { + uint32_t regs[7]; + uint32_t align1[9]; +}; + +struct eint_regs { + struct eint_section sta; + struct eint_section ack; + struct eint_section mask; + struct eint_section mask_set; + struct eint_section mask_clr; + struct eint_section sens; + struct eint_section sens_set; + struct eint_section sens_clr; + struct eint_section soft; + struct eint_section soft_set; + struct eint_section soft_clr; + struct eint_section rsv00; + struct eint_section pol; + struct eint_section pol_set; + struct eint_section pol_clr; + struct eint_section rsv01; + uint32_t d0en[7]; + uint32_t rsv02; + uint32_t d1en[7]; +}; + +check_member(eint_regs, d1en, 0x420); + +static struct eint_regs *const mtk_eint = (void *)(EINT_BASE); + +/* + * Firmware never enables interrupts on this platform. This function + * reads current EINT status and clears the pending interrupt. + * + * Returns 1 if the interrupt was pending, else 0. + */ +int gpio_eint_poll(gpio_t gpio); + +/* + * Configure a GPIO to handle external interrupts (EINT) of given irq type. + */ +void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type); + #endif |