diff options
author | Nico Huber <nico.huber@secunet.com> | 2019-02-14 17:52:25 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-21 19:10:00 +0000 |
commit | 16a41ccaa182a65fbb5b0e6755b17ac6c0f20150 (patch) | |
tree | e947f4a617727431d68c83023665f4d663fd667c /src/soc/intel | |
parent | 26071aaadfc5926f7e01623d8fb2967456041dfc (diff) |
sb/intel/bd82x6x: Fix default IRQ mapping
The default mapping was probably copy-pasted from a random
board and disabled some interrupts (by implicitly clearing
some register bits).
We provide a new default mapping with some reasoning, that
tries to be most compatible (i.e. avoids to use PIRQ E-H
that are not shareable on some boards).
The following functions had their interrupt pin disabled
before:
o SATA 2 (explicitly, no board seems to enable the device)
o PCIe Root Port #4, #6-#8 (probably by accident)
PIRQs used before this change: A-D, F and H. After this
change: A-D.
Change-Id: I33f82702ea9c1b9c22ce14f01ee630dbf6203362
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31498
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions