diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-10-28 10:14:31 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-02 16:03:29 +0000 |
| commit | ba15a598b0415c6adfd9a5d3a37f1693cc11b5b0 (patch) | |
| tree | 5cbf5500e4bf638f85b66a837e9452fc668e47d0 /src/soc/intel | |
| parent | 67d62fdfedcfe3391bea9ad76cf64d8c472bd364 (diff) | |
soc/intel/denverton_ns: Fetch addr bits at runtime
Change-Id: Ic46a7d56cbaf45724ebc2a1911f5096af2fe461a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/denverton_ns/acpi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 82b8cf111f..ab6e7cc14d 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -4,6 +4,7 @@ #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> +#include <cpu/cpu.h> #include <cpu/x86/smm.h> #include <string.h> #include <device/pci.h> @@ -60,7 +61,7 @@ void soc_fill_gnvs(struct global_nvs *gnvs) gnvs->mmiob = (u32)get_top_of_low_memory(); gnvs->mmiol = (u32)(get_pciebase() - 1); gnvs->mmiohb = (u64)get_top_of_upper_memory(); - gnvs->mmiohl = (u64)(((u64)1 << CONFIG_CPU_ADDR_BITS) - 1); + gnvs->mmiohl = (u64)(((u64)1 << cpu_phys_address_size()) - 1); gnvs->tsegb = (u32)get_tseg_memory(); gnvs->tsegl = (u32)(get_top_of_low_memory() - get_tseg_memory()); } |