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authorWerner Zeh <werner.zeh@siemens.com>2022-05-17 10:19:19 +0200
committerMartin L Roth <gaumless@tutanota.com>2022-05-23 14:49:10 +0000
commitb60e69bde852b59db41df047794086ef25ff5f43 (patch)
treef92c535b21a4621135c496788d9114b7388ddc10 /src/soc/intel
parentea2c1d357cccf4ee84473d304c880250fbd97080 (diff)
soc/intel/apollolake: Enable SSDT for fast SPI controller
Since the fast SPI controller is hidden on Apollo Lake the OS cannot probe it and is therefore unaware of the reserved resources assigned in coreboot. Select 'FAST_SPI_GENERATE_SSDT' to enable SSDT creation to report the reserved resources to the OS. Change-Id: I23e77a0a01141dc4f299988d19509e6df555a654 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index c5a3547e6a..05cc3a6136 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -37,6 +37,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_NHLT
# Misc options
select CACHE_MRC_SETTINGS
+ select FAST_SPI_GENERATE_SSDT
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
select FSP_STATUS_GLOBAL_RESET_REQUIRED_5
select GENERIC_GPIO_LIB