diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-07-17 08:01:36 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-07-19 03:54:55 +0000 |
| commit | 3c192de91f3de00217c81a9e034fe9439b6d35e7 (patch) | |
| tree | 8ed9650f17d927c412e10601900d9fe43ad02e03 /src/soc/intel | |
| parent | 9ad48e9ea43630828495f32903ace6cf2d36dd0c (diff) | |
device/pci_ids: Add new Intel PTL device IDs for eSPI/LPC
This patch adds new eSPI/LPC PCI device IDs for Intel PTL-U and PTL-H.
Additionally, updates the LPC driver's `pci_device_ids` list to
include these new IDs.
Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2
BUG=b:347669091
TEST=Able to build google/fatcat.
Change-Id: Ie9f0ea9536e2f73c2258e9e12b510d21212248ea
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/lpc/lpc.c | 72 |
1 files changed, 64 insertions, 8 deletions
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 0b8c722a69..147c4f1621 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -141,14 +141,70 @@ struct device_operations lpc_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DID_INTEL_PTL_ESPI_0, - PCI_DID_INTEL_PTL_ESPI_1, - PCI_DID_INTEL_PTL_ESPI_2, - PCI_DID_INTEL_PTL_ESPI_3, - PCI_DID_INTEL_PTL_ESPI_4, - PCI_DID_INTEL_PTL_ESPI_5, - PCI_DID_INTEL_PTL_ESPI_6, - PCI_DID_INTEL_PTL_ESPI_7, + PCI_DID_INTEL_PTL_U_H_ESPI_0, + PCI_DID_INTEL_PTL_U_H_ESPI_1, + PCI_DID_INTEL_PTL_U_H_ESPI_2, + PCI_DID_INTEL_PTL_U_H_ESPI_3, + PCI_DID_INTEL_PTL_U_H_ESPI_4, + PCI_DID_INTEL_PTL_U_H_ESPI_5, + PCI_DID_INTEL_PTL_U_H_ESPI_6, + PCI_DID_INTEL_PTL_U_H_ESPI_7, + PCI_DID_INTEL_PTL_U_H_ESPI_8, + PCI_DID_INTEL_PTL_U_H_ESPI_9, + PCI_DID_INTEL_PTL_U_H_ESPI_10, + PCI_DID_INTEL_PTL_U_H_ESPI_11, + PCI_DID_INTEL_PTL_U_H_ESPI_12, + PCI_DID_INTEL_PTL_U_H_ESPI_13, + PCI_DID_INTEL_PTL_U_H_ESPI_14, + PCI_DID_INTEL_PTL_U_H_ESPI_15, + PCI_DID_INTEL_PTL_U_H_ESPI_16, + PCI_DID_INTEL_PTL_U_H_ESPI_17, + PCI_DID_INTEL_PTL_U_H_ESPI_18, + PCI_DID_INTEL_PTL_U_H_ESPI_19, + PCI_DID_INTEL_PTL_U_H_ESPI_20, + PCI_DID_INTEL_PTL_U_H_ESPI_21, + PCI_DID_INTEL_PTL_U_H_ESPI_22, + PCI_DID_INTEL_PTL_U_H_ESPI_23, + PCI_DID_INTEL_PTL_U_H_ESPI_24, + PCI_DID_INTEL_PTL_U_H_ESPI_25, + PCI_DID_INTEL_PTL_U_H_ESPI_26, + PCI_DID_INTEL_PTL_U_H_ESPI_27, + PCI_DID_INTEL_PTL_U_H_ESPI_28, + PCI_DID_INTEL_PTL_U_H_ESPI_29, + PCI_DID_INTEL_PTL_U_H_ESPI_30, + PCI_DID_INTEL_PTL_U_H_ESPI_31, + PCI_DID_INTEL_PTL_H_ESPI_0, + PCI_DID_INTEL_PTL_H_ESPI_1, + PCI_DID_INTEL_PTL_H_ESPI_2, + PCI_DID_INTEL_PTL_H_ESPI_3, + PCI_DID_INTEL_PTL_H_ESPI_4, + PCI_DID_INTEL_PTL_H_ESPI_5, + PCI_DID_INTEL_PTL_H_ESPI_6, + PCI_DID_INTEL_PTL_H_ESPI_7, + PCI_DID_INTEL_PTL_H_ESPI_8, + PCI_DID_INTEL_PTL_H_ESPI_9, + PCI_DID_INTEL_PTL_H_ESPI_10, + PCI_DID_INTEL_PTL_H_ESPI_11, + PCI_DID_INTEL_PTL_H_ESPI_12, + PCI_DID_INTEL_PTL_H_ESPI_13, + PCI_DID_INTEL_PTL_H_ESPI_14, + PCI_DID_INTEL_PTL_H_ESPI_15, + PCI_DID_INTEL_PTL_H_ESPI_16, + PCI_DID_INTEL_PTL_H_ESPI_17, + PCI_DID_INTEL_PTL_H_ESPI_18, + PCI_DID_INTEL_PTL_H_ESPI_19, + PCI_DID_INTEL_PTL_H_ESPI_20, + PCI_DID_INTEL_PTL_H_ESPI_21, + PCI_DID_INTEL_PTL_H_ESPI_22, + PCI_DID_INTEL_PTL_H_ESPI_23, + PCI_DID_INTEL_PTL_H_ESPI_24, + PCI_DID_INTEL_PTL_H_ESPI_25, + PCI_DID_INTEL_PTL_H_ESPI_26, + PCI_DID_INTEL_PTL_H_ESPI_27, + PCI_DID_INTEL_PTL_H_ESPI_28, + PCI_DID_INTEL_PTL_H_ESPI_29, + PCI_DID_INTEL_PTL_H_ESPI_30, + PCI_DID_INTEL_PTL_H_ESPI_31, PCI_DID_INTEL_LNL_ESPI_0, PCI_DID_INTEL_LNL_ESPI_1, PCI_DID_INTEL_LNL_ESPI_2, |