diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-08-30 18:08:20 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-09-02 03:37:32 +0000 |
| commit | 09ea33cdd81aece1069b12a557d45da2320b3ed4 (patch) | |
| tree | ce810dfd7f4d6dada6b62757f49c6fc7a0fd785d /src/soc/intel | |
| parent | 6f07ca947138d136339f0638ee03556be56e0181 (diff) | |
soc/intel/alderlake: Prevent overlapping boot screens
Previously, `early_graphics_stop()` was skipped unconditionally if
`CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)` was enabled. This led
to overlapping screens when CSE sync was not triggered in ramstage,
as both the eSOL message and the firmware splash screen would be
displayed.
This change refactors the condition for calling `early_graphics_stop()`
to ensure it is only skipped if a CSE firmware update is actually
required *and* `CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)` is set.
This allows eSOL to display its message during CSE sync, but tears
down early graphics programming in other cases to prevent overlapping
screens.
Additionally, this change ensures that `early_graphics_stop()` is the
last function called by the romstage to guarantee proper cleanup.
BUG=b:362895813
TEST=Able to boot google/tivviks_ufs without overlapping screens.
Change-Id: Idc01bfc8963d65fcb0441300e7c9267eaaefefb9
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Amanda Hwang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/romstage/romstage.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index b577e32a48..ff600db7b0 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -215,16 +215,18 @@ void mainboard_romstage_entry(void) if (!s3wake) save_dimm_info(); + if (CONFIG(ENABLE_EARLY_DMA_PROTECTION)) + vtd_enable_dma_protection(); + + /* Keep eSOL active if CSE sync is pending at ramstage */ + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) && is_cse_fw_update_required()) + return; + /* * Turn-off early graphics configuration with two purposes: * - Clear any potentially still on-screen message * - Allow PEIM graphics driver to smoothly execute in ramstage if * RUN_FSP_GOP is selected */ - if (!CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)) - /* Keep eSOL active if CSE sync in ramstage config is enabled */ - early_graphics_stop(); - - if (CONFIG(ENABLE_EARLY_DMA_PROTECTION)) - vtd_enable_dma_protection(); + early_graphics_stop(); } |