diff options
author | Subrata Banik <subratabanik@google.com> | 2023-02-01 17:19:50 +0530 |
---|---|---|
committer | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-02-02 11:38:33 +0000 |
commit | 794137e2a82eca7e7b2428759007155243009720 (patch) | |
tree | 39cd2f8b7ad97b84ddb0a0213a8b97a7391a78d3 /src/soc/intel | |
parent | b184e6e0a1ccd1d2cb2cc53d06f7969c98cca899 (diff) |
soc/intel/meteorlake: Enable V1p05-PHY supply external FET control
This patch enables S0i2.2 by letting 1.5V Phy supply to control the
externa FET.
BUG=b:256805904
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8771c11ce3b305343c7e96510e1375538d5e7f04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72709
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index e850eaa259..f8d3f6e0b5 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -643,6 +643,7 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, s_cfg->EnergyEfficientTurbo = 1; s_cfg->PmcLpmS0ixSubStateEnableMask = get_supported_lpm_mask(); s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion; + s_cfg->PmcV1p05PhyExtFetControlEn = 1; } |