diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2023-01-19 10:02:55 +0100 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2023-01-20 05:41:21 +0000 |
| commit | 244a3655e16571cc6218cc58853b66de47afcd4d (patch) | |
| tree | 7ccce6d852bb38b21df8bb8f2bb233899683543b /src/soc/intel | |
| parent | 1a0a280cff1fd2d5748aa80a23f52397818b20b7 (diff) | |
soc/intel: Remove unused <stddef.h>
Change-Id: I8432d799c9bf23058b7b903bb07f6c2b4308eeba
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72103
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
14 files changed, 1 insertions, 38 deletions
diff --git a/src/soc/intel/alderlake/include/soc/gpio_defs.h b/src/soc/intel/alderlake/include/soc/gpio_defs.h index a50aec9380..8e6222cc19 100644 --- a/src/soc/intel/alderlake/include/soc/gpio_defs.h +++ b/src/soc/intel/alderlake/include/soc/gpio_defs.h @@ -3,9 +3,6 @@ #ifndef _SOC_ALDERLAKE_GPIO_DEFS_H_ #define _SOC_ALDERLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h b/src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h index a2ab413267..1fc3cda9ac 100644 --- a/src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h +++ b/src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h @@ -3,9 +3,6 @@ #ifndef _SOC_ALDERLAKE_GPIO_DEFS_PCH_S_H_ #define _SOC_ALDERLAKE_GPIO_DEFS_PCH_S_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs_pch_s.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h index 3a22d25bb3..679d538b2d 100644 --- a/src/soc/intel/alderlake/include/soc/romstage.h +++ b/src/soc/intel/alderlake/include/soc/romstage.h @@ -4,7 +4,6 @@ #define _SOC_ROMSTAGE_H_ #include <fsp/api.h> -#include <stddef.h> void mainboard_memory_init_params(FSPM_UPD *memupd); void systemagent_early_init(void); diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h index 2ee078d54a..17fb7d534f 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h @@ -3,9 +3,6 @@ #ifndef _SOC_CANNONLAKE_GPIO_DEFS_H_ #define _SOC_CANNONLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h index 4f87459cc4..6e9e2b0921 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h @@ -3,9 +3,6 @@ #ifndef _SOC_CANNONLAKE_GPIO_DEFS_CNP_H_H_ #define _SOC_CANNONLAKE_GPIO_DEFS_CNP_H_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs_cnp_h.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/common/block/include/intelblocks/p2sblib.h b/src/soc/intel/common/block/include/intelblocks/p2sblib.h index 9f6b97d6e2..122e79026e 100644 --- a/src/soc/intel/common/block/include/intelblocks/p2sblib.h +++ b/src/soc/intel/common/block/include/intelblocks/p2sblib.h @@ -3,7 +3,6 @@ #ifndef SOC_INTEL_COMMON_BLOCK_P2SBLIB_H #define SOC_INTEL_COMMON_BLOCK_P2SBLIB_H -#include <stddef.h> #include <stdint.h> /* P2SB generic configuration register */ diff --git a/src/soc/intel/elkhartlake/include/soc/gpio_defs.h b/src/soc/intel/elkhartlake/include/soc/gpio_defs.h index 61d7f6a9bc..ef7c6c57c5 100644 --- a/src/soc/intel/elkhartlake/include/soc/gpio_defs.h +++ b/src/soc/intel/elkhartlake/include/soc/gpio_defs.h @@ -3,12 +3,8 @@ #ifndef _SOC_ELKHARTLAKE_GPIO_DEFS_H_ #define _SOC_ELKHARTLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> - #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ #define NUM_GPIO_COMx_GPI_REGS(n) \ diff --git a/src/soc/intel/jasperlake/include/soc/gpio_defs.h b/src/soc/intel/jasperlake/include/soc/gpio_defs.h index 51ef5314d9..8f6f5f7298 100644 --- a/src/soc/intel/jasperlake/include/soc/gpio_defs.h +++ b/src/soc/intel/jasperlake/include/soc/gpio_defs.h @@ -3,9 +3,6 @@ #ifndef _SOC_JASPERLAKE_GPIO_DEFS_H_ #define _SOC_JASPERLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/meteorlake/include/soc/gpio_defs.h b/src/soc/intel/meteorlake/include/soc/gpio_defs.h index 8b5d2d94fa..ca2e8dd2d3 100644 --- a/src/soc/intel/meteorlake/include/soc/gpio_defs.h +++ b/src/soc/intel/meteorlake/include/soc/gpio_defs.h @@ -3,9 +3,6 @@ #ifndef _SOC_METEORLAKE_GPIO_DEFS_H_ #define _SOC_METEORLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/meteorlake/include/soc/romstage.h b/src/soc/intel/meteorlake/include/soc/romstage.h index b9b3cf8bb6..2eaa84b7a0 100644 --- a/src/soc/intel/meteorlake/include/soc/romstage.h +++ b/src/soc/intel/meteorlake/include/soc/romstage.h @@ -4,7 +4,6 @@ #define _SOC_ROMSTAGE_H_ #include <fsp/api.h> -#include <stddef.h> #include <soc/soc_chip.h> void mainboard_update_premem_soc_chip_config(struct soc_intel_meteorlake_config *config); diff --git a/src/soc/intel/skylake/include/soc/gpio_defs.h b/src/soc/intel/skylake/include/soc/gpio_defs.h index de14bb6de9..0e98b89169 100644 --- a/src/soc/intel/skylake/include/soc/gpio_defs.h +++ b/src/soc/intel/skylake/include/soc/gpio_defs.h @@ -2,9 +2,7 @@ #ifndef _SOC_GPIO_DEFS_H_ #define _SOC_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif + #if CONFIG(SKYLAKE_SOC_PCH_H) # include <soc/gpio_pch_h_defs.h> #else diff --git a/src/soc/intel/tigerlake/include/soc/gpio_defs.h b/src/soc/intel/tigerlake/include/soc/gpio_defs.h index f58fb55c3c..57eeaf3f0e 100644 --- a/src/soc/intel/tigerlake/include/soc/gpio_defs.h +++ b/src/soc/intel/tigerlake/include/soc/gpio_defs.h @@ -3,9 +3,6 @@ #ifndef _SOC_TIGERLAKE_GPIO_DEFS_H_ #define _SOC_TIGERLAKE_GPIO_DEFS_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/tigerlake/include/soc/gpio_defs_pch_h.h b/src/soc/intel/tigerlake/include/soc/gpio_defs_pch_h.h index 1a9b2f3b0d..abf99b809f 100644 --- a/src/soc/intel/tigerlake/include/soc/gpio_defs_pch_h.h +++ b/src/soc/intel/tigerlake/include/soc/gpio_defs_pch_h.h @@ -3,9 +3,6 @@ #ifndef _SOC_TIGERLAKE_GPIO_DEFS_PCH_H_H_ #define _SOC_TIGERLAKE_GPIO_DEFS_PCH_H_H_ -#ifndef __ACPI__ -#include <stddef.h> -#endif #include <soc/gpio_soc_defs_pch_h.h> #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */ diff --git a/src/soc/intel/xeon_sp/lbg/include/soc/gpio_soc_defs.h b/src/soc/intel/xeon_sp/lbg/include/soc/gpio_soc_defs.h index 6f3ddcd6bf..52082567ca 100644 --- a/src/soc/intel/xeon_sp/lbg/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/xeon_sp/lbg/include/soc/gpio_soc_defs.h @@ -3,10 +3,6 @@ #ifndef LEWISBURG_GPIO_DEFS_H #define LEWISBURG_GPIO_DEFS_H -#ifndef __ACPI__ -#include <stddef.h> -#endif - /* GPIO Community 0 */ #define COMM_0 0 #define GPP_A 0x0 |