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authorSean Rhodes <sean@starlabs.systems>2022-07-28 21:35:35 +0100
committerSean Rhodes <sean@starlabs.systems>2022-12-22 21:17:26 +0000
commit197cfe03d559edbf884be81a0a121e20c4b0c63a (patch)
tree2bf340e832cad02ea7bce8f85ade595f1adfd780 /src/soc/intel
parentde19bc372b57aaf003dcbbd1dcd55fa1a183ef6e (diff)
soc/intel/apollolake/acpi: Tidy the PCI Memory Region
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8997f9c111142a908b60675023d1a7dd86d3632a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66238 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/acpi/northbridge.asl9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index aa45f45fa9..2437a1b545 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -72,11 +72,14 @@ Method (_CRS, 0, Serialized)
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000,,, PM01)
- /* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
+ /*
+ * PCI Memory Region above 4 GiB
+ * (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE))
+ */
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
- 0x00000000, 0x10000, 0x1ffff, 0x00000000,
- 0x10000,,, PM02)
+ 0x00000000, 0x00010000, 0x0001ffff, 0x00000000,
+ 0x00010000,,, PM02)
})
/* Find PCI resource area in MCRS */