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authorChris Wang <chris.wang@amd.corp-partner.google.com>2020-10-05 13:39:14 +0800
committerEdward O'Callaghan <quasisec@chromium.org>2020-10-08 01:30:36 +0000
commit5ec975e31a2c4f6bc11cdc811811dd58e10b52ac (patch)
tree744bf23511b5aadda51727da6d493640e9fc3a06 /src/soc/intel
parent806554237b819ac548f3206d1864524e81df8378 (diff)
soc/amd/picasso: Remove xhci0_force_gen1 from soc config
To remove the xhci0_force_gen1 and use usb3_port_force_gen1 instead. The xhci0_force_gen1 is used for force all port on xhci0 to USB3 GEN1. Now variant can use the usb3_port_force_gen1 to customize which port it needs to limit. BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1 Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: If5f0c1f22d8c98c4461f09d074bf082c340b14d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel')
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