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authorMatt DeVillier <matt.devillier@gmail.com>2020-03-29 16:58:48 -0500
committerMatt DeVillier <matt.devillier@gmail.com>2020-04-02 20:45:20 +0000
commit8ff2ecd3448fa47dfad3753bd5a50917e2b86f61 (patch)
treebdb64592f3bbb798461339e7a80cd25b5e152b06 /src/soc/intel
parentc72f5f74a890ddd20e7849fce7d693a1fdd6da66 (diff)
soc/intel/braswell: add ACPI backlight support
Add hook to generate ACPI methods in SSDT for screen backlight control. To make use of this, individual boards will need to include default_brightness_levels.asl in their dsdt, as well as add 'register "gfx" = "GMA_STATIC_DISPLAYS(0)"' to their devicetree. Change-Id: I0adccc6c8bee71d3c1b7840518308c8dc8ea2d81 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/braswell/chip.h3
-rw-r--r--src/soc/intel/braswell/gfx.c9
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index 026e491006..5f1aaee3be 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -21,6 +21,7 @@
#define _SOC_CHIP_H_
#include <stdint.h>
+#include <drivers/intel/gma/i915.h>
#include <fsp/util.h>
#include <intelblocks/lpc_lib.h>
#include <soc/pci_devs.h>
@@ -169,6 +170,8 @@ struct soc_intel_braswell_config {
uint8_t I2C4Frequency;
uint8_t I2C5Frequency;
uint8_t I2C6Frequency;
+
+ struct i915_gpu_controller_info gfx;
};
#endif /* _SOC_CHIP_H_ */
diff --git a/src/soc/intel/braswell/gfx.c b/src/soc/intel/braswell/gfx.c
index ff73955d7a..12fe6427f0 100644
--- a/src/soc/intel/braswell/gfx.c
+++ b/src/soc/intel/braswell/gfx.c
@@ -18,6 +18,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <drivers/intel/gma/opregion.h>
+#include <drivers/intel/gma/i915.h>
#include <reg_script.h>
#include <soc/gfx.h>
#include <soc/nvs.h>
@@ -87,12 +88,20 @@ void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
gnvs_ptr->aslb = aslb;
}
+static void gma_generate_ssdt(struct device *dev)
+{
+ const struct soc_intel_braswell_config *chip = dev->chip_info;
+
+ drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
+}
+
static struct device_operations gfx_device_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gfx_init,
.ops_pci = &soc_pci_ops,
+ .acpi_fill_ssdt = gma_generate_ssdt,
};
static const struct pci_driver gfx_driver __pci_driver = {