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authorFelix Held <felix-coreboot@felixheld.de>2022-10-18 19:22:21 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-20 16:40:59 +0000
commitc6e4cc8873791b1c112ef8bd392a1aab1e940246 (patch)
tree8f7bae5d293804ad0838c5e25360df3ea8b3a8a3 /src/soc/intel/tigerlake
parentacd98d87722adbf8cc94c770881cf3105b02786f (diff)
soc/amd/*/uart: add missing soc/iomap.h include
soc/iomap.h provides the UART base address information used in the uart_info struct. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7defd135dc888cfc7d6e1c106d72116425560576 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68532 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
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