summaryrefslogtreecommitdiff
path: root/src/soc/intel/tigerlake/soundwire.c
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-11-25 09:45:40 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-06-22 13:01:52 +0000
commit64c9c6d54c2bfc4b3d7c9058f2a80a56b58a9a4f (patch)
tree30b5c378a114b6167a9cb9e02204beaabe9d6e21 /src/soc/intel/tigerlake/soundwire.c
parentcebf1e8c463bc8614877c524a19ecf0eedae5f47 (diff)
soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR
This adds a macro to find an available MTRR(s) to set up CAR. This added complexity is not required on bootpaths without bootguard but with bootguard MTRR's have already been set up by the ACM so we need to figure out at runtime which ones are available. Change-Id: I7d5442c75464cfb2b3611c63a472c8ee521c014d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/tigerlake/soundwire.c')
0 files changed, 0 insertions, 0 deletions