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| author | Huayang Duan <huayang.duan@mediatek.com> | 2020-06-22 19:36:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-26 07:35:59 +0000 |
| commit | a0ef67879802f47c4e6e979fa0dd5a872960efc0 (patch) | |
| tree | f5831fc0c6e3e2f43f18cfdc26e64e862d8a7db1 /src/soc/intel/tigerlake/reset.c | |
| parent | 3c16fe4fade9f1c695a52e756fa638cb8cd0e9f6 (diff) | |
mb/google/asurada: Load dram params from sdram config
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I2cc38115c27cbbe157fc850bbd88b10ae8001f52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/reset.c')
0 files changed, 0 insertions, 0 deletions