soc/intel: Add definition of D0 stepping for TigerLake Halo

Change-Id: Ic080ffe7912ad71c77af09d2f3d1d9b08d9ffac8
Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index 1ecaf77ab5..8f90b3c6a3 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -25,6 +25,7 @@ static struct {
 } cpu_table[] = {
 	{ CPUID_TIGERLAKE_A0, "Tigerlake A0" },
 	{ CPUID_TIGERLAKE_B0, "Tigerlake B0" },
+	{ CPUID_TIGERLAKE_P0, "Tigerlake P0" },
 	{ CPUID_TIGERLAKE_R0, "Tigerlake R0" },
 };