diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-09-02 17:04:14 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-09-04 12:54:55 +0000 |
| commit | 8db1dfb9cb8ae797214f7506a3204faf3af00945 (patch) | |
| tree | 62c80abfd2e8d0020f94dabeadcc594e3e68b75a /src/soc/intel/skylake | |
| parent | 13cee3c19599b8f4acdb9a9fc5ad78716cc70d6d (diff) | |
soc/intel: Refactor ITSS macros
This patch refactors ITSS related SoC specific macros by consolidating
them into a common itss.h file. This improves code maintainability and
reduces redundancy as each SoC previously defined the same macros.
Specific changes include:
- Move SoC specific ITSS macros into intelblocks/itss.h.
- SoC code now includes intelblocks/itss.h instead of the SoC-local
soc/itss.h.
- Drop soc/itss.h from static ASL files.
- Delete soc/itss.h from all SoC locals except Apollo Lake and
Sky Lake.
TEST=Able to build and boot google/hatch, google/xol and google/karis.
Change-Id: I6461dc93b0d21bec5429075bc26435bae3754d74
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84183
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/acpi/pch.asl | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/itss.h | 6 |
3 files changed, 3 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index a2ab35c2da..832663315d 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -4,7 +4,6 @@ #include <intelblocks/pcr.h> #include <soc/iomap.h> #include <soc/irq.h> -#include <soc/itss.h> #include <soc/gpe.h> #include <soc/pcr_ids.h> diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 050a2722ed..d1cc6f91ac 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -22,8 +22,8 @@ #include <soc/intel/common/vbt.h> #include <soc/interrupt.h> #include <soc/iomap.h> -#include <soc/irq.h> #include <soc/itss.h> +#include <soc/irq.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/systemagent.h> diff --git a/src/soc/intel/skylake/include/soc/itss.h b/src/soc/intel/skylake/include/soc/itss.h index 8bb0e124e1..9501b14692 100644 --- a/src/soc/intel/skylake/include/soc/itss.h +++ b/src/soc/intel/skylake/include/soc/itss.h @@ -3,11 +3,9 @@ #ifndef SOC_INTEL_SKL_ITSS_H #define SOC_INTEL_SKL_ITSS_H +#include <intelblocks/itss.h> + #define GPIO_IRQ_START 50 #define GPIO_IRQ_END ITSS_MAX_IRQ -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - #endif /* SOC_INTEL_SKL_ITSS_H */ |