diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-04-16 22:05:36 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-04-25 18:14:38 +0200 |
| commit | e4d7abc0d448c7e805f2b48ed1251708d1f84c67 (patch) | |
| tree | 4ca1014c9d972063e7b44c8a373072008c6015fa /src/soc/intel/skylake | |
| parent | 4003950881af6fc4761aa0b177a3670d04ee9881 (diff) | |
lib: provide clearer devicetree semantics
The devicetree data structures have been available in more than just
ramstage and romstage. In order to provide clearer and consistent
semantics two new macros are provided:
1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE
2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST
The ROMSTAGE_CONST attribute is used in the source code to mark
the devicetree data structures as const in early stages even though
it's not just romstage. Therefore, rename the attribute to
DEVTREE_CONST as that's the actual usage. The only place where the
usage was not devicetree related is console_loglevel, but the same
name was used for consistency. Any stage that is not ramstage has
the const C attribute applied when DEVTREE_CONST is used.
Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19333
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/bootblock/i2c.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/gspi.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/bootblock/i2c.c b/src/soc/intel/skylake/bootblock/i2c.c index 59cb5c8bc2..f8859a4607 100644 --- a/src/soc/intel/skylake/bootblock/i2c.c +++ b/src/soc/intel/skylake/bootblock/i2c.c @@ -44,8 +44,8 @@ uintptr_t lpss_i2c_base_address(unsigned int bus) static void i2c_early_init_bus(unsigned int bus) { - ROMSTAGE_CONST struct soc_intel_skylake_config *config; - ROMSTAGE_CONST struct device *tree_dev; + DEVTREE_CONST struct soc_intel_skylake_config *config; + DEVTREE_CONST struct device *tree_dev; pci_devfn_t dev; int devfn; uintptr_t base; diff --git a/src/soc/intel/skylake/gspi.c b/src/soc/intel/skylake/gspi.c index e04ae93b52..eef5433826 100644 --- a/src/soc/intel/skylake/gspi.c +++ b/src/soc/intel/skylake/gspi.c @@ -22,9 +22,9 @@ const struct gspi_cfg *gspi_get_soc_cfg(void) { - ROMSTAGE_CONST struct soc_intel_skylake_config *config; + DEVTREE_CONST struct soc_intel_skylake_config *config; int devfn = SA_DEVFN_ROOT; - ROMSTAGE_CONST struct device *dev = dev_find_slot(0, devfn); + DEVTREE_CONST struct device *dev = dev_find_slot(0, devfn); if (!dev || !dev->chip_info) { printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 209bb902e8..9b38531129 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -484,8 +484,8 @@ void poweroff(void) void pmc_gpe_init(void) { - ROMSTAGE_CONST struct soc_intel_skylake_config *config; - ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCH_DEVFN_PMC); + DEVTREE_CONST struct soc_intel_skylake_config *config; + DEVTREE_CONST struct device *dev = dev_find_slot(0, PCH_DEVFN_PMC); uint8_t *pmc_regs; uint32_t gpio_cfg; uint32_t gpio_cfg_reg; |