diff options
| author | david <david_wu@quantatw.com> | 2015-12-07 17:40:02 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-15 12:01:29 +0100 |
| commit | b7a42d388b97c7956dd648fc2f49195142a8b4e2 (patch) | |
| tree | 3479a7545484c40d8069589c71b2eac0ef8ee27e /src/soc/intel/skylake | |
| parent | 228aae589cca0f0025da476150da247c247a711a (diff) | |
google/lars: Set DPTF critical temperature to 99C
DPTF may power off the system when it starts if the CPU temp is >90C.
Since TJmax is 100C set the critical threshold to just below that value.
BRANCH=none
BUG=none
TEST=Build and boot on lars.
Change-Id: I3abf946ae09c3c691480e468d0c1d74730dc6c06
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7c2230009edb840e88a20c2d8a87f942c09b6bf3
Original-Change-Id: Iee1a3596dbbe934f68637f012c02c078c3751eeb
Original-Signed-off-by: David Wu <David_Wu@quantatw.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/316102
Original-Commit-Ready: David Wu <david_wu@quantatw.com>
Original-Tested-by: David Wu <david_wu@quantatw.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/12955
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions