diff options
author | Subrata Banik <subratabanik@google.com> | 2024-04-02 08:00:14 +0000 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-04-06 04:31:50 +0000 |
commit | 9c4d85d83af20b7e83ebcb577cd3566619abd545 (patch) | |
tree | 383e9d2a4ec05c872b03226e7a5ca9eb869f510e /src/soc/intel/skylake/chip.c | |
parent | 49437a6945d039bf5c39eef883d42cb63559b79e (diff) |
lib: Refactor bmp_load_logo() implementation
This refactoring ensures bmp_load_logo() takes logo_size as an
argument, returning a valid logo_ptr only if logo_size is non-zero.
This prevents potential errors from mismatched size assumption.
BUG=b:242829490
TEST=google/rex0 builds successfully.
Change-Id: I14bc54670a67980ec93bc366b274832d1f959e50
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81618
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
-rw-r--r-- | src/soc/intel/skylake/chip.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index ea091ce0ac..050a2722ed 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -529,5 +529,7 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) /* Handle FSP logo params */ void soc_load_logo(FSPS_UPD *supd) { - bmp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize); + size_t logo_size; + supd->FspsConfig.LogoPtr = (uint32_t)(uintptr_t)bmp_load_logo(&logo_size); + supd->FspsConfig.LogoSize = (uint32_t)logo_size; } |